From: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu, 31 Oct 2013 20:05:13 +0000 (-0600)
Subject: Merge branch 'pci/yijing-mps-v1' into next
X-Git-Tag: v3.13-rc1~95^2~4
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=cc17a67c0762a6030b43e98d775a12a99e5ff247;p=linux.git

Merge branch 'pci/yijing-mps-v1' into next

* pci/yijing-mps-v1:
  drm/radeon: use pcie_get_readrq() and pcie_set_readrq() to simplify code
  staging: et131x: Use pci_dev->pcie_mpss and pcie_set_readrq() to simplify code
  IB/qib: Drop qib_tune_pcie_caps() and qib_tune_pcie_coalesce() return values
  IB/qib: Use pcie_set_mps() and pcie_get_mps() to simplify code
  IB/qib: Use pci_is_root_bus() to check whether it is a root bus
  tile/PCI: use cached pci_dev->pcie_mpss to simplify code
  PCI: Export pcie_set_mps() and pcie_get_mps()
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cc17a67c0762a6030b43e98d775a12a99e5ff247