From: Geert Uytterhoeven Date: Mon, 30 Nov 2015 14:16:52 +0000 (+0100) Subject: ARM: shmobile: sh73a0: Add MSIOF device nodes X-Git-Tag: v4.5-rc1~43^2~25^2~23 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=d74f61fee39d5896913d268b60884b13b43edee7;p=linux.git ARM: shmobile: sh73a0: Add MSIOF device nodes The sh73a0 has 4 MSIOF devices, located in the A3SP power area. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 635564ab98ed..3a6056f9f0d2 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -273,6 +273,50 @@ mmcif: mmc@e6bd0000 { status = "disabled"; }; + msiof0: spi@e6e20000 { + compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; + reg = <0xe6e20000 0x0064>; + interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks SH73A0_CLK_MSIOF0>; + power-domains = <&pd_a3sp>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6e10000 { + compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; + reg = <0xe6e10000 0x0064>; + interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks SH73A0_CLK_MSIOF1>; + power-domains = <&pd_a3sp>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6e00000 { + compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; + reg = <0xe6e00000 0x0064>; + interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks SH73A0_CLK_MSIOF2>; + power-domains = <&pd_a3sp>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof3: spi@e6c90000 { + compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; + reg = <0xe6c90000 0x0064>; + interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks SH73A0_CLK_MSIOF3>; + power-domains = <&pd_a3sp>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee100000 0x100>;