From: Dylan Reid <dgreid@chromium.org>
Date: Mon, 3 Mar 2014 04:44:01 +0000 (-0800)
Subject: ALSA: hda - Mark reg op args as iomem
X-Git-Tag: v3.15-rc1~142^2~3^2~20
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=db291e36a4c511c0e95817b0083d78c66efbb4e0;p=linux.git

ALSA: hda - Mark reg op args as iomem

The ops to read and write registers should take pointers labeled as
__iomem.  Thanks to the sparse bot for catching this.

Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
---

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 149c00b00320..77ca894f8284 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1431,32 +1431,32 @@ static void azx_firmware_cb(const struct firmware *fw, void *context)
  */
 
 /* PCI register access. */
-static void pci_azx_writel(u32 value, u32 *addr)
+static void pci_azx_writel(u32 value, u32 __iomem *addr)
 {
 	writel(value, addr);
 }
 
-static u32 pci_azx_readl(u32 *addr)
+static u32 pci_azx_readl(u32 __iomem *addr)
 {
 	return readl(addr);
 }
 
-static void pci_azx_writew(u16 value, u16 *addr)
+static void pci_azx_writew(u16 value, u16 __iomem *addr)
 {
 	writew(value, addr);
 }
 
-static u16 pci_azx_readw(u16 *addr)
+static u16 pci_azx_readw(u16 __iomem *addr)
 {
 	return readw(addr);
 }
 
-static void pci_azx_writeb(u8 value, u8 *addr)
+static void pci_azx_writeb(u8 value, u8 __iomem *addr)
 {
 	writeb(value, addr);
 }
 
-static u8 pci_azx_readb(u8 *addr)
+static u8 pci_azx_readb(u8 __iomem *addr)
 {
 	return readb(addr);
 }
diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h
index 198fa825fa0e..ba38b819f984 100644
--- a/sound/pci/hda/hda_priv.h
+++ b/sound/pci/hda/hda_priv.h
@@ -290,12 +290,12 @@ struct azx;
 /* Functions to read/write to hda registers. */
 struct hda_controller_ops {
 	/* Register Access */
-	void (*reg_writel)(u32 value, u32 *addr);
-	u32 (*reg_readl)(u32 *addr);
-	void (*reg_writew)(u16 value, u16 *addr);
-	u16 (*reg_readw)(u16 *addr);
-	void (*reg_writeb)(u8 value, u8 *addr);
-	u8 (*reg_readb)(u8 *addr);
+	void (*reg_writel)(u32 value, u32 __iomem *addr);
+	u32 (*reg_readl)(u32 __iomem *addr);
+	void (*reg_writew)(u16 value, u16 __iomem *addr);
+	u16 (*reg_readw)(u16 __iomem *addr);
+	void (*reg_writeb)(u8 value, u8 __iomem *addr);
+	u8 (*reg_readb)(u8 __iomem *addr);
 	/* Disable msi if supported, PCI only */
 	int (*disable_msi_reset_irq)(struct azx *);
 	/* Allocation ops */