From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Sat, 16 Jul 2016 00:42:14 +0000 (-0700)
Subject: arm64: dts: qcom: msm8916: Add tcsr syscon
X-Git-Tag: v4.9-rc1~75^2~12^2~13
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=e95c08f45a8ecf9fa2e106f7e8243b7c850bde7f;p=linux.git

arm64: dts: qcom: msm8916: Add tcsr syscon

The TCSR memory segment includes various functionality, among other
things the halt-registers for the Hexagon.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
---

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 1e67acc19a9d..64f85f82602c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -234,6 +234,11 @@ tcsr_mutex_regs: syscon@1905000 {
 			reg = <0x1905000 0x20000>;
 		};
 
+		tcsr: syscon@1937000 {
+			compatible = "qcom,tcsr-msm8916", "syscon";
+			reg = <0x1937000 0x30000>;
+		};
+
 		tcsr_mutex: hwlock {
 			compatible = "qcom,tcsr-mutex";
 			syscon = <&tcsr_mutex_regs 0 0x1000>;