From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Date: Mon, 6 Aug 2018 08:52:11 +0000 (+0530)
Subject: tty: serial: uartlite: Enable clocks at probe
X-Git-Tag: v4.20-rc1~71^2~52
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=ea42d7a67a9e2b2e780eacbf9b2c3848c9ce2a0f;p=linux.git

tty: serial: uartlite: Enable clocks at probe

At probe the uartlite is getting configured.
Enable the clocks before assiging uart and
disable after probe is done.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index 98d3eadd2fd0..69411b6cc2a2 100644
--- a/drivers/tty/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
@@ -776,13 +776,17 @@ static int ulite_probe(struct platform_device *pdev)
 		pdata->clk = NULL;
 	}
 
-	ret = clk_prepare(pdata->clk);
+	ret = clk_prepare_enable(pdata->clk);
 	if (ret) {
 		dev_err(&pdev->dev, "Failed to prepare clock\n");
 		return ret;
 	}
 
-	return ulite_assign(&pdev->dev, id, res->start, irq, pdata);
+	ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata);
+
+	clk_disable(pdata->clk);
+
+	return ret;
 }
 
 static int ulite_remove(struct platform_device *pdev)