From: Stephen Warren Date: Tue, 24 Feb 2015 21:00:50 +0000 (-0700) Subject: pinctrl: tegra: support nvidia,io-hv DT property X-Git-Tag: v4.1-rc1~135^2~61 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=ec654e50c67ad4ba89c9f9f81ccf6f061695e36d;p=linux.git pinctrl: tegra: support nvidia,io-hv DT property Both nvidia,io-hv and nvidia,rcv-sel represent the fact that a particular pin's IO buffers are configured to accept "high voltage" input signals. The TRM for different chips names the register field rcv-sel on older SoCs and io_hv on newer SoCs. Add the new naming option into the pinctrl driver so that DT files can use naming consistent with the TRM. This new property name will be documented in the patch that adds support for the new SoC. Signed-off-by: Stephen Warren Tested-by: Alexandre Courbot Signed-off-by: Linus Walleij --- diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c index 6cd651a88398..4c95c2024a1c 100644 --- a/drivers/pinctrl/pinctrl-tegra.c +++ b/drivers/pinctrl/pinctrl-tegra.c @@ -103,6 +103,7 @@ static const struct cfg_param { {"nvidia,lock", TEGRA_PINCONF_PARAM_LOCK}, {"nvidia,io-reset", TEGRA_PINCONF_PARAM_IORESET}, {"nvidia,rcv-sel", TEGRA_PINCONF_PARAM_RCV_SEL}, + {"nvidia,io-hv", TEGRA_PINCONF_PARAM_RCV_SEL}, {"nvidia,high-speed-mode", TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE}, {"nvidia,schmitt", TEGRA_PINCONF_PARAM_SCHMITT}, {"nvidia,low-power-mode", TEGRA_PINCONF_PARAM_LOW_POWER_MODE},