From: Kukjin Kim <kgene.kim@samsung.com>
Date: Fri, 6 Aug 2010 12:34:55 +0000 (+0900)
Subject: Merge branch 'next-s5p' into for-next
X-Git-Tag: v2.6.36-rc1~102^2^2^2^2~7
X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=f2b7e3c54a304677a1142829fb5913595885379f;p=linux.git

Merge branch 'next-s5p' into for-next

Conflicts:
	arch/arm/mach-s5pv210/mach-aquila.c
	arch/arm/mach-s5pv210/mach-goni.c
---

f2b7e3c54a304677a1142829fb5913595885379f
diff --cc arch/arm/mach-s5pc100/mach-smdkc100.c
index 83a5d648a980,c708db35960d..a63c8a46571d
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@@ -43,13 -42,9 +43,13 @@@
  #include <plat/s5pc100.h>
  #include <plat/fb.h>
  #include <plat/iic.h>
 +#include <plat/ata.h>
 +#include <plat/adc.h>
 +#include <plat/keypad.h>
 +#include <plat/ts.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PC100_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
+ #define SMDKC100_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
  				 S3C2410_UCON_RXILEVEL |	\
  				 S3C2410_UCON_TXIRQMODE |	\
  				 S3C2410_UCON_RXIRQMODE |	\
diff --cc arch/arm/mach-s5pv210/mach-aquila.c
index 0c894010e278,9d30213463ef..a6b4ed364840
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@@ -35,56 -28,49 +35,56 @@@
  #include <plat/devs.h>
  #include <plat/cpu.h>
  #include <plat/fb.h>
 +#include <plat/sdhci.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
+ #define AQUILA_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
  				 S3C2410_UCON_RXILEVEL |	\
  				 S3C2410_UCON_TXIRQMODE |	\
  				 S3C2410_UCON_RXIRQMODE |	\
  				 S3C2410_UCON_RXFIFO_TOI |	\
  				 S3C2443_UCON_RXERR_IRQEN)
  
- #define S5PV210_ULCON_DEFAULT	S3C2410_LCON_CS8
+ #define AQUILA_ULCON_DEFAULT	S3C2410_LCON_CS8
  
- #define S5PV210_UFCON_DEFAULT	S3C2410_UFCON_FIFOMODE
 -#define AQUILA_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
 -				 S5PV210_UFCON_TXTRIG4 |	\
 -				 S5PV210_UFCON_RXTRIG4)
++#define AQUILA_UFCON_DEFAULT	S3C2410_UFCON_FIFOMODE
  
 -static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
 +static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
  	[0] = {
  		.hwport		= 0,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
+ 		.ucon		= AQUILA_UCON_DEFAULT,
+ 		.ulcon		= AQUILA_ULCON_DEFAULT,
 -		.ufcon		= AQUILA_UFCON_DEFAULT,
 +		/*
 +		 * Actually UART0 can support 256 bytes fifo, but aquila board
 +		 * supports 128 bytes fifo because of initial chip bug
 +		 */
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
++		.ufcon		= AQUILA_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
  	},
  	[1] = {
  		.hwport		= 1,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= AQUILA_UCON_DEFAULT,
+ 		.ulcon		= AQUILA_ULCON_DEFAULT,
 -		.ufcon		= AQUILA_UFCON_DEFAULT,
++		.ufcon		= AQUILA_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
  	},
  	[2] = {
  		.hwport		= 2,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= AQUILA_UCON_DEFAULT,
+ 		.ulcon		= AQUILA_ULCON_DEFAULT,
 -		.ufcon		= AQUILA_UFCON_DEFAULT,
++		.ufcon		= AQUILA_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
  	},
  	[3] = {
  		.hwport		= 3,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= AQUILA_UCON_DEFAULT,
+ 		.ulcon		= AQUILA_ULCON_DEFAULT,
 -		.ufcon		= AQUILA_UFCON_DEFAULT,
++		.ufcon		= AQUILA_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
  	},
  };
  
diff --cc arch/arm/mach-s5pv210/mach-goni.c
index a094b44a43e8,1521ea11e8c7..0be739e5bfe6
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@@ -34,53 -25,49 +34,53 @@@
  #include <plat/s5pv210.h>
  #include <plat/devs.h>
  #include <plat/cpu.h>
 +#include <plat/fb.h>
 +#include <plat/sdhci.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
+ #define GONI_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
  				 S3C2410_UCON_RXILEVEL |	\
  				 S3C2410_UCON_TXIRQMODE |	\
  				 S3C2410_UCON_RXIRQMODE |	\
  				 S3C2410_UCON_RXFIFO_TOI |	\
  				 S3C2443_UCON_RXERR_IRQEN)
  
- #define S5PV210_ULCON_DEFAULT	S3C2410_LCON_CS8
+ #define GONI_ULCON_DEFAULT	S3C2410_LCON_CS8
  
- #define S5PV210_UFCON_DEFAULT	S3C2410_UFCON_FIFOMODE
 -#define GONI_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
 -				 S5PV210_UFCON_TXTRIG4 |	\
 -				 S5PV210_UFCON_RXTRIG4)
++#define GONI_UFCON_DEFAULT	S3C2410_UFCON_FIFOMODE
  
  static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
  	[0] = {
  		.hwport		= 0,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= GONI_UCON_DEFAULT,
+ 		.ulcon		= GONI_ULCON_DEFAULT,
 -		.ufcon		= GONI_UFCON_DEFAULT,
++		.ufcon		= GONI_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256,
  	},
  	[1] = {
  		.hwport		= 1,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= GONI_UCON_DEFAULT,
+ 		.ulcon		= GONI_ULCON_DEFAULT,
 -		.ufcon		= GONI_UFCON_DEFAULT,
++		.ufcon		= GONI_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
  	},
  	[2] = {
  		.hwport		= 2,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= GONI_UCON_DEFAULT,
+ 		.ulcon		= GONI_ULCON_DEFAULT,
 -		.ufcon		= GONI_UFCON_DEFAULT,
++		.ufcon		= GONI_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
  	},
  	[3] = {
  		.hwport		= 3,
  		.flags		= 0,
- 		.ucon		= S5PV210_UCON_DEFAULT,
- 		.ulcon		= S5PV210_ULCON_DEFAULT,
- 		.ufcon		= S5PV210_UFCON_DEFAULT |
+ 		.ucon		= GONI_UCON_DEFAULT,
+ 		.ulcon		= GONI_ULCON_DEFAULT,
 -		.ufcon		= GONI_UFCON_DEFAULT,
++		.ufcon		= GONI_UFCON_DEFAULT |
 +			S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
  	},
  };
  
diff --cc arch/arm/mach-s5pv210/mach-smdkc110.c
index 9f4f0bdd2cc3,7878f695f2ce..8211bb87c54b
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@@ -26,11 -25,9 +26,11 @@@
  #include <plat/s5pv210.h>
  #include <plat/devs.h>
  #include <plat/cpu.h>
 +#include <plat/ata.h>
 +#include <plat/iic.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
+ #define SMDKC110_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
  				 S3C2410_UCON_RXILEVEL |	\
  				 S3C2410_UCON_TXIRQMODE |	\
  				 S3C2410_UCON_RXIRQMODE |	\
diff --cc arch/arm/mach-s5pv210/mach-smdkv210.c
index 1e4ed147dbc7,d1df1882ab18..fbbc0a3c3738
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@@ -28,12 -27,9 +28,12 @@@
  #include <plat/cpu.h>
  #include <plat/adc.h>
  #include <plat/ts.h>
 +#include <plat/ata.h>
 +#include <plat/iic.h>
 +#include <plat/keypad.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
+ #define SMDKV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
  				 S3C2410_UCON_RXILEVEL |	\
  				 S3C2410_UCON_TXIRQMODE |	\
  				 S3C2410_UCON_RXIRQMODE |	\