From: Andrea Adami Date: Sat, 20 Jul 2013 23:07:33 +0000 (+0200) Subject: mtd: jedec_probe: fix LH28F640BF definition X-Git-Tag: v3.12-rc1~82^2~97 X-Git-Url: https://asedeno.scripts.mit.edu/gitweb/?a=commitdiff_plain;h=fe2f4c8e0bf2756b670ee78fa9772613a2ea8495;p=linux.git mtd: jedec_probe: fix LH28F640BF definition Zaurus 5500 contains 2 LH28F640BFHE-PTTL90 (64M 4Mx16) and the LH28F640BFHE-PTTL90.pdf datasheet available on the net shows the exact erasesize and the OTP support. At the moment only jedec_probe can discover the chip and the NOR is mounted read only probably because of wrong vpp. Signed-off-by: Andrea Adami Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c index c443f527a53a..7c0b27d132b1 100644 --- a/drivers/mtd/chips/jedec_probe.c +++ b/drivers/mtd/chips/jedec_probe.c @@ -120,7 +120,7 @@ #define PM49FL008 0x006A /* Sharp */ -#define LH28F640BF 0x00b0 +#define LH28F640BF 0x00B0 /* ST - www.st.com */ #define M29F800AB 0x0058 @@ -1299,13 +1299,14 @@ static const struct amd_flash_info jedec_table[] = { .mfr_id = CFI_MFR_SHARP, .dev_id = LH28F640BF, .name = "LH28F640BF", - .devtypes = CFI_DEVICETYPE_X8, + .devtypes = CFI_DEVICETYPE_X16, .uaddr = MTD_UADDR_UNNECESSARY, - .dev_size = SIZE_4MiB, - .cmd_set = P_ID_INTEL_STD, - .nr_regions = 1, + .dev_size = SIZE_8MiB, + .cmd_set = P_ID_INTEL_EXT, + .nr_regions = 2, .regions = { - ERASEINFO(0x40000,16), + ERASEINFO(0x10000, 127), + ERASEINFO(0x02000, 8), } }, { .mfr_id = CFI_MFR_SST,