Olof Johansson [Wed, 6 Nov 2019 15:47:54 +0000 (07:47 -0800)]
Merge tag 'imx-dt64-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree changes for 5.5:
- Add the initial support for a new arm64 family SoC from NXP:
S32V234 ("Treerunner") vision microprocessors which are targeted for
high-performance, computationally intensive vision and sensor fusion
applications that require automotive safety levels.
- New board support: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri and
S32V234 EVB.
- A series of patch from Andrey Smirnov to improve zii-ultra support by
fixing regulator and adding accelerometer, switch watchdog.
- Add system counter device and enable cpuidle support for i.MX8MN.
- Move usdhc clocks assignment from SoC to board level DTS for
i.MX8 based boards.
- Add PCA6416 on I2C3 bus for imx8mm-evk, and enable SCU key for
imx8qxp-mek board.
- Enable GPU passive throttling on i.MX8MQ SoC, and add DDR PMU device
for i.MX8MN.
- A series from Fabio Estevam to fix DTC W=1 warnings for LS1028A device.
- Update the clock providers for the Mali DP500 and '#clock-cells' of
DPCLK node for LS1028A SoC.
- Misc small updates on various boards.
* tag 'imx-dt64-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (40 commits)
arm64: dts: imx8mn-evk: Remove invalid Atheros properties
arm64: dts: freescale: add initial support for colibri imx8x
arm64: dts: ls1028a: Fix tmu unit address
arm64: dts: ls1028a: Move thermal-zone out of SoC
arm64: dts: ls1028a-qds: Remove unnecessary #address-cells/#size-cells
arm64: dts: imx8mn: Remove duplicated machine compatible
arm64: dts: imx8mm: Remove duplicated machine compatible
arm64: dts: imx8mq-evk: Add remote control
arm64: dts: imx8mn: Add LPDDR4 EVK board support
arm64: dts: imx8mn: Create EVK dtsi file for common use
arm64: dts: imx8mn: Move usdhc clocks assignment to board DT
arm64: dts: imx8mm: Move usdhc clocks assignment to board DT
arm64: dts: imx8mq: Move usdhc clocks assignment to board DT
arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT
arm64: dts: fsl: Add device tree for S32V234-EVB
arm64: dts: imx8mm-evk: Assigned clocks for audio plls
arm64: dts: zii-ultra: Add node for switch watchdog
arm64: dts: zii-ultra: Add node for accelerometer
arm64: dts: zii-ultra: Fix regulator-3p3-main's name
arm64: dts: zii-ultra: Fix regulator-vsd-3v3's vin-supply
...
Olof Johansson [Wed, 6 Nov 2019 15:47:19 +0000 (07:47 -0800)]
Merge tag 'imx-dt-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree changes for 5.5:
- New board support: Netronix E60K02 and Kobo Clara HD, Kontron N6311
and N6411, OPOS6UL and OPOS6ULDev.
- Correct speed grading fuse settings and add opp-suspend property for
i.MX7D device tree.
- Move usdhc clocks assignment from SoC to board level DTS for imx7ulp,
and use APLL_PFD1 as usdhc's clock source on imx7ulp-evk board.
- Add missing cooling device properties for CPUs for i.MX6/7 SoCs.
- Add sensor GPIO regulator and assign power supplies for magnetometer
for imx6ul-14x14-evk board.
- Replace "simple-bus" with "simple-mfd" for ANATOP device for i.MX6/7
SoCs.
- Fix DTC W=1 warnings by not using simple-audio-card,dai-link on
imx6qdl-gw551x and imx6q-gw54xx board.
- Move to use DRM bindings for the Seiko 43WVF1G panel on imx53-qsb.
- A series from Frieder Schrempf to support more i.MX6UL/ULL-based SoMs
and boards from Kontron Electronics GmbH.
- A few patches from Michal Vokáč to enable more devices support on
imx6dl-yapp4 board.
- A patch series from Philippe Schenker to improve i.MX6/7 Apalis and
Colibri board support.
- A patch series from Sébastien Szymanski to update i.MX6 APF6/APF6Dev
device tree with more devices added and adopting DRM bindings for
display.
- Random improvements, clean-up and device additions on various boards.
* tag 'imx-dt-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (68 commits)
ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix indentation
ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent polarity to usb nodes
ARM: dts: imx6ul-kontron-n6x1x: Add 'chosen' node with 'stdout-path'
ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S' and 'N6411 S'
ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
ARM: dts: imx6ul-kontron-n6310-s: Disable the snvs-poweroff driver
ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate file
ARM: dts: imx7ulp-evk: Use APLL_PFD1 as usdhc's clock source
ARM: dts: imx: add devicetree for Kobo Clara HD
ARM: dts: add Netronix E60K02 board common file
ARM: dts: vf-colibri: fix typo in top-level module compatible
ARM: dts: imx53-qsb: Use DRM bindings for the Seiko 43WVF1G panel
ARM: dts: imx53: Spelling s/configration/configuration/
ARM: dts: imx6ul-14x14-evk: Assign power supplies for magnetometer
ARM: dts: imx6ul-14x14-evk: Fix the magnetometer node name
ARM: dts: imx6ul-14x14-evk: Add sensors' GPIO regulator
ARM: dts: imx6ul: Disable gpt2 by default
ARM: dts: imx7d: Add missing cooling device properties for CPUs
ARM: dts: imx6dl: Add missing cooling device properties for CPUs
...
Olof Johansson [Wed, 6 Nov 2019 15:47:03 +0000 (07:47 -0800)]
Merge tag 'imx-bindings-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX dt-bindings update for 5.5:
- Update fsl.yaml to include DT compatibles for following devices:
Kobo Clara HD, i.MX8MN LPDDR4 EVK, S32V234-EVB, Kontron i.MX6UL/ULL
boards, Toradex apalis/colibri boards, Variscite and Armadeus i.MX6
boards.
* tag 'imx-bindings-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add more Kontron i.MX6UL/ULL compatibles
dt-bindings: arm: fsl: add compatible string for Kobo Clara HD
dt-bindings: arm: fsl: add nxp based toradex colibri-imx8x bindings
dt-bindings: arm: fsl: add nxp based toradex apalis/colibri bindings
dt-bindings: arm: fsl: Document Variscite i.MX6q devicetree
dt-bindings: arm: imx: Add the i.MX8MN LPDDR4 EVK board
dt-bindings: arm: fsl: Add the S32V234-EVB board
dt-bindings: arm: Document Armadeus SoM and Dev boards devicetree binding
Olof Johansson [Wed, 6 Nov 2019 15:42:02 +0000 (07:42 -0800)]
Merge tag 'sunxi-dt-for-5.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
A few more DT patches for 5.5, mostly:
- USB3 support for the H6
- Deinterlacer support for the H3
- eDP Bridge support on the Teres-I
- More DT cleanups thanks to the validation
Andre Przywara [Tue, 5 Nov 2019 11:06:51 +0000 (11:06 +0000)]
arm64: dts: allwinner: a64: Re-add PMU node
As it was found recently, the Performance Monitoring Unit (PMU) on the
Allwinner A64 SoC was not generating (the right) interrupts. With the
SPI numbers from the manual the kernel did not receive any overflow
interrupts, so perf was not happy at all.
It turns out that the numbers were just off by 4, so the PMU interrupts
are from 148 to 151, not from 152 to 155 as the manual describes.
This was found by playing around with U-Boot, which typically does not
use interrupts, so the GIC is fully available for experimentation:
With *every* PPI and SPI enabled, an overflowing PMU cycle counter was
found to set a bit in one of the GICD_ISPENDR registers, with careful
counting this was determined to be number 148.
Tested with perf record and perf top on a Pine64-LTS. Also tested with
tasksetting to every core to confirm the assignment between IRQs and
cores.
This somewhat "revert-fixes" commit ed3e9406bcbc ("arm64: dts: allwinner:
a64: Drop PMU node").
Fixes: 34a97fcc71c2 ("arm64: dts: allwinner: a64: Add PMU node") Fixes: ed3e9406bcbc ("arm64: dts: allwinner: a64: Drop PMU node") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Ondrej Jirman [Sun, 20 Oct 2019 13:42:29 +0000 (15:42 +0200)]
arm64: dts: allwinner: orange-pi-3: Enable USB 3.0 host support
Enable Allwinner's USB 3.0 phy and the host controller. Orange Pi 3
board has GL3510 USB 3.0 4-port hub connected to the SoC's USB 3.0
port. All four ports are exposed via USB3-A connectors. VBUS is
always on, since it's powered directly from DCIN (VCC-5V) and
not switchable.
Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Jernej Skrabec [Wed, 23 Oct 2019 22:13:29 +0000 (00:13 +0200)]
ARM: dts: sunxi: h3/h5: Add MBUS controller node
Both, H3 and H5, contain MBUS, which is the bus used by DMA devices to
access system memory.
MBUS controller is responsible for arbitration between channels based
on set priority and can do some other things as well, like report
bandwidth used. It also maps RAM region to different address than CPU.
Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix indentation
The ECSPI1 is not used for a FRAM chip, so remove the comment.
While at it, also change some whitespaces to tabs to comply with the
indentation style of the rest of the file.
ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent polarity to usb nodes
To silence the warnings shown by the driver at boot time, we add a
fixed regulator for the 5V supply of usbotg2 and specify the polarity
of the overcurrent signal for usbotg1.
ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S' and 'N6411 S'
The 'N6311 S' and the 'N6411 S' are similar to the Kontron 'N6310 S'
evaluation kit boards. Instead of the N6310 SoM, they feature a N6311
or N6411 SoM.
ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
The baseboard for the Kontron N6310 SoM is also used for other SoMs
such as N6311 and N6411. In order to share the code, we move the
definitions of the baseboard to a separate dtsi file.
ARM: dts: imx6ul-kontron-n6310-s: Disable the snvs-poweroff driver
The snvs-poweroff driver can power off the system by pulling the
PMIC_ON_REQ signal low, to let the PMIC disable the power.
The Kontron SoMs do not have this signal connected, so let's remove
the node.
This fixes a real issue when the signal is asserted at poweroff,
but not actually causing the power to turn off. It was observed,
that in this case the system would not shut down properly.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
The N6311 and the N6411 SoM are similar to the Kontron N6310 SoM.
They are pin-compatible, but feature a larger RAM and NAND flash
(512MiB instead of 256MiB). Further, the N6411 has an i.MX6ULL SoC,
instead of an i.MX6UL.
ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate file
The Kontron N6311 and N6411 SoMs are very similar to N6310. In
preparation to add support for them, we move the common nodes to a
separate file imx6ul-kontron-n6x1x-som-common.dtsi.
Anson Huang [Thu, 31 Oct 2019 00:43:42 +0000 (08:43 +0800)]
ARM: dts: imx7ulp-evk: Use APLL_PFD1 as usdhc's clock source
i.MX7ULP does NOT support runtime switching clock source for PCC,
APLL_PFD1 by default is usdhc's clock source, so just use it
in kernel to avoid below kernel dump during kernel boot up and
make sure kernel can boot up with SD root file-system.
Andreas Kemnade [Sat, 26 Oct 2019 19:57:47 +0000 (21:57 +0200)]
ARM: dts: add Netronix E60K02 board common file
The Netronix board E60K02 can be found some several Ebook-Readers,
at least the Kobo Clara HD and the Tolino Shine 3. The board
is equipped with different SoCs requiring different pinmuxes.
For now the following peripherals are included:
- LED
- Power Key
- Cover (gpio via hall sensor)
- RC5T619 PMIC (the kernel misses support for rtc and charger
subdevices).
- Backlight via lm3630a
- Wifi sdio chip detection (mmc-powerseq and stuff)
It is based on vendor kernel but heavily reworked due to many
changed bindings.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Olof Johansson [Mon, 4 Nov 2019 01:32:25 +0000 (17:32 -0800)]
Merge tag 'mvebu-dt64-5.5-1' of git://git.infradead.org/linux-mvebu into arm/dt
mvebu dt64 for 5.5 (part 1)
- Add new Marvell CN9130 SoC support (CN9130 is made of one AP807 and
one internal CP115, similar to the Armada 7K/8K using AP806 and
CP110).
- Reorganize EspressoBin device tree to add new variant of the boards
(Armada 3270 based)
- Add firmware node for turris Mox (Armada 3720 based)
* tag 'mvebu-dt64-5.5-1' of git://git.infradead.org/linux-mvebu: (23 commits)
arm64: dts: armada-3720-turris-mox: add firmware node
arm64: dts: marvell: add ESPRESSObin variants
arm64: dts: marvell: Add support for Marvell CN9132-DB
arm64: dts: marvell: Add support for Marvell CN9131-DB
arm64: dts: marvell: Add support for Marvell CN9130-DB
arm64: dts: marvell: Add support for Marvell CN9130 SoC support
arm64: dts: marvell: Add support for CP115
arm64: dts: marvell: Externalize PCIe macros from CP11x file
arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
arm64: dts: marvell: Prepare the introduction of CP115
arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment alignment
arm64: dts: marvell: Add AP807-quad cache description
arm64: dts: marvell: Add AP806-quad cache description
arm64: dts: marvell: Add AP806-dual cache description
arm64: dts: marvell: Add support for AP807/AP807-quad
dt-bindings: marvell: Declare the CN913x SoC compatibles
dt-bindings: marvell: Convert the SoC compatibles description to YAML
arm64: dts: marvell: Move clocks to AP806 specific file
arm64: dts: marvell: Prepare the introduction of AP807 based SoCs
MAINTAINERS: Add new Marvell CN9130-based files to track
...
Olof Johansson [Mon, 4 Nov 2019 01:31:40 +0000 (17:31 -0800)]
Merge tag 'mvebu-dt-5.5-1' of git://git.infradead.org/linux-mvebu into arm/dt
mvebu dt for 5.5 (part 1)
- Enable L2 cache parity and ECC on a Armada XP SoC family and allow
to use in on the Armada 38x SoCs too.
- Use correct name for the rs5c372a on synology (Kirkwood based)
- Rename "sa-sram" node to "sram" on dove
* tag 'mvebu-dt-5.5-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-xp: add label to sdram-controller node
ARM: dts: mvebu: add sdram controller node to Armada-38x
ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg
ARM: dts: dove: Rename "sa-sram" node to "sram"
ARM: dts: kirkwood: synology: Fix rs5c372 RTC entry
Olof Johansson [Mon, 4 Nov 2019 01:31:21 +0000 (17:31 -0800)]
Merge tag 'tegra-for-5.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.5-rc1
Adds support for DP and XUSB on various boards, enables SMMU support for
more devices and fixes a couple of DTC warnings and inconsistencies that
are reported at runtime.
These changes along with some of the driver changes in other branches
allow suspend/resume support on Tegra210 devices (e.g. Jetson TX1 and
Jetson Nano).
* tag 'tegra-for-5.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits)
arm64: tegra: Add Jetson Nano SC7 timings
arm64: tegra: Add Jetson TX1 SC7 timings
arm64: tegra: Enable wake from deep sleep on RTC alarm
arm64: tegra: Add PMU on Tegra210
arm64: tegra: Add blank lines for better readability
arm64: tegra: Enable DisplayPort on Jetson AGX Xavier
arm64: tegra: p2888: Rename regulators for consistency
arm64: tegra: Enable DP support on Jetson TX2
arm64: tegra: Fix compatible for SOR1
arm64: tegra: Enable DP support on Jetson Nano
arm64: tegra: Add SOR0_OUT clock on Tegra210
arm64: tegra: Assume no CLKREQ presence by default
arm64: tegra: Enable SMMU for VIC on Tegra186
arm64: tegra: Enable XUSB host controller on Jetson TX2
arm64: tegra: Enable SMMU for XUSB host on Tegra186
arm64: tegra: Enable XUSB pad controller on Jetson TX2
arm64: tegra: Add ethernet alias on Jetson AGX Xavier
arm64: tegra: Fix compatible string for EQOS on Tegra194
arm64: tegra: Hook up edp interrupt on Tegra210 SOCTHERM
arm64: tegra: Fix base address for SOR1 on Tegra194
...
Marcel Ziswiler [Sat, 26 Oct 2019 09:04:02 +0000 (11:04 +0200)]
arm64: dts: freescale: add initial support for colibri imx8x
This patch adds the device tree to support Toradex Colibri iMX8X a
computer on module which can be used on different carrier boards.
The module consists of an NXP i.MX 8X family SoC (either i.MX 8DualX or
8QuadXPlus), a PF8100 PMIC, a FastEthernet PHY, 1 or 2 GB of LPDDR4
RAM, some level shifters, a Micron eMMC, a USB hub, an AD7879 resistive
touch controller, an SGTL5000 audio codec and on-module CSI as well as
DSI-LVDS FFC receptacles plus an optional Bluetooth/Wi-Fi module.
Anything that is not self-contained on the module is disabled by
default.
The device tree for the Colibri Evaluation Board includes the module's
device tree and enables the supported peripherals of the carrier board
(the Colibri Evaluation Board supports almost all of them).
So far there is no display or USB functionality supported at all but
basic console UART, eMMC and Ethernet functionality work fine.
Olof Johansson [Mon, 4 Nov 2019 01:27:39 +0000 (17:27 -0800)]
Merge tag 'tegra-for-5.5-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.5-rc1
Adds support for CPU frequency scaling on Tegra20 and Tegra30, EMC
frequency scaling on Tegra30, SMMU support for VDE on Tegra30, the
STMPE ADC found on Toradex T30 modules as well as fixes for eDP
support on Venice2.
* tag 'tegra-for-5.5-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: cardhu-a04: Add CPU Operating Performance Points
ARM: tegra: cardhu-a04: Set up voltage regulators for DVFS
ARM: tegra: trimslice: Add CPU Operating Performance Points
ARM: tegra: paz00: Add CPU Operating Performance Points
ARM: tegra: paz00: Set up voltage regulators for DVFS
ARM: tegra: Add CPU Operating Performance Points for Tegra30
ARM: tegra: Add CPU Operating Performance Points for Tegra20
ARM: tegra: Add Tegra30 CPU clock
ARM: tegra: Add Tegra20 CPU clock
ARM: tegra: Add External Memory Controller node on Tegra30
ARM: tegra: nyan-big: Add timings for RAM codes 4 and 6
ARM: tegra: Connect SMMU with Video Decoder Engine on Tegra30
ARM: tegra: Add eDP power supplies on Venice2
ARM: tegra: Add SOR0_OUT clock on Tegra124
ARM: tegra: Add stmpe-adc DT node to Toradex T30 modules
Olof Johansson [Mon, 4 Nov 2019 01:07:51 +0000 (17:07 -0800)]
Merge tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of DT patches, with this time mostly:
- Mali GPU support for the H6
- Two new crypto drivers enablement
- A few fixes to our DTs, fixed through the validation effort
- New boards: NanoPi Duo2
* tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (22 commits)
dt-bindings: arm: sunxi: add FriendlyARM NanoPi Duo2
ARM: dts: sun8i: add FriendlyARM NanoPi Duo2
arm64: allwinner: h6: Enable GPU node for Tanix TX6
arm64: dts: allwinner: bluetooth for Emlid Neutis N5
ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins
ARM: dts: sun9i: a80: Add Security System node
ARM: dts: sun8i: a83t: Add Security System node
arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6
arm64: dts: allwinner: sun50i: Add crypto engine node on H5
arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64
ARM: dts: sun8i: H3: Add Crypto Engine node
ARM: dts: sun8i: R40: add crypto engine node
dt-bindings: crypto: Add DT bindings documentation for sun8i-ce Crypto Engine
arm64: dts: allwinner: Add mali GPU supply for H6 boards
arm64: dts: allwinner: Add ARM Mali GPU node for H6
ARM: dts: sun8i: a83t: a711: Add touchscreen node
ARM: dts: sun5i: olinuxino micro: Fix AT24 node name
ARM: dts: sun9i: Add missing watchdog clocks
arm64: dts: sun50i: sopine-baseboard: Expose serial1, serial2 and serial3
arm64: dts: allwinner: orange-pi-3: Enable UART1 / Bluetooth
...
Olof Johansson [Mon, 4 Nov 2019 01:05:18 +0000 (17:05 -0800)]
Merge tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.5 (take two)
- Video-Input and Serial-ATA support on RZ/G2N,
- Color Management Module support on various R-Car Gen3 SoCs,
- Initial support for the R-Car M3-W+ (r8a77961) SoC on the
Salvator-XS board.
* tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+
arm64: dts: renesas: Add Renesas R8A77961 SoC support
arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
dt-bindings: power: Add r8a77961 SYSC power domain definitions
arm64: dts: renesas: r8a774b1: Add SATA controller node
arm64: dts: renesas: rcar-gen3: Add CMM units
arm64: dts: renesas: r8a774b1: Add VIN and CSI-2 support
Olof Johansson [Mon, 4 Nov 2019 01:02:06 +0000 (17:02 -0800)]
Merge tag 'omap-for-v5.5/prm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
PRM reset control dts changes for v5.5 merge window
This series of changes adds the PRM reset driver nodes for am3/4, omap4/5
and dra7 SoCs. The reset driver changes make it easier to add support for
various accelerators for TI SoCs in a more generic way.
Note that this branch is based on the PRM reset driver changes branch.
* tag 'omap-for-v5.5/prm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5: Add PRM data
ARM: dts: am43xx: Add PRM data
ARM: dts: am33xx: Add PRM data
ARM: dts: omap4: add PRM nodes
ARM: dts: dra7: add PRM nodes
soc: ti: omap-prm: add omap5 PRM data
soc: ti: omap-prm: add am4 PRM data
soc: ti: omap-prm: add dra7 PRM data
soc: ti: omap-prm: add data for am33xx
soc: ti: omap-prm: add omap4 PRM data
soc: ti: omap-prm: add support for denying idle for reset clockdomain
soc: ti: omap-prm: poll for reset complete during de-assert
soc: ti: add initial PRM driver with reset control support
dt-bindings: omap: add new binding for PRM instances
Add GPIO controllers for RDA8810PL SoC. There are 4 GPIO controllers
in this SoC with maximum of 32 gpios. Except GPIOC, all controllers
are capable of generating edge/level interrupts from first 8 lines.
The rc protocol must be selected by writing to:
/sys/devices/platform/ir-receiver/rc/rc0/protocols
On my tests, I used "nec" rc protocol:
echo nec > protocols
Tested using evetest:
evtest /dev/input/event0
Output log for each key pressed:
Event:
time 1568122608.267845, -------------- SYN_REPORT ------------
Event:
time 1568122610.503835, type 4 (EV_MSC), code 4 (MSC_SCAN), value 440
Signed-off-by: Rogerio Pimentel da Silva <rpimentel.silva@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Olof Johansson [Sat, 2 Nov 2019 20:34:24 +0000 (13:34 -0700)]
Merge tag 'socfpga_dts_updates_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.5
- Arria10
- modify QSPI read-delay property
- Agilex
- Add QSPI support
- Enable USB and LEDs
- Add service layer, fpga manager support
- Stratix10
- Update QSPI reg address
* tag 'socfpga_dts_updates_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: agilex: add service layer, fpga manager and fpga region
arm64: agilex: enable USB and LEDs on agilex devkit
arm64: dts: altera: update QSPI reg addresses for Stratix10
arm64: dts: agilex: add QSPI support for Intel Agilex
ARM: dts: arria10: Modify QSPI read_delay for Arria10
arm64: dts: renesas: Add Renesas R8A77961 SoC support
Add initial support for the Renesas R-Car M3-W+ (R8A77961) SoC.
This includes:
- Cortex-A57 and Cortex-A53 CPU cores
(incl. L2 caches and power state definitions),
- Power Management Unit,
- PSCI firmware,
- Pin Function Controller,
- Clock, Reset, System, and Interrupt Controllers,
- SCIF2 serial console,
- Product Register,
- ARM Architectured Timer,
and various placeholders to allow to use salvator-xs.dtsi.
arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960
CONFIG_ARCH_R8A7796 for R-Car M3-W (R8A77960) will be renamed to
CONFIG_ARCH_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_ARCH_R8A77961.
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car
M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's
Manual (Rev. 2.00, Jul. 31, 2019). A gap is added for CSIREF, to
preserve compatibility with the definitions for R-Car M3-W (R8A77960).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2)
are not included, as they are used as internal clock sources only, and
never referenced from DT.
arm64: dts: allwinner: bluetooth for Emlid Neutis N5
The Emlid Neutis N5 board has AP6212 BT+WiFi chip. This patch is in
line with 8558c6e21ceb ("ARM: dts: sun8i: h3: bluetooth for Banana Pi
M2 Zero board") and other commits that add Bluetooth support for
similar boards.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Corentin Labbe [Fri, 25 Oct 2019 18:51:28 +0000 (20:51 +0200)]
ARM: dts: sun9i: a80: Add Security System node
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms.
It could be found on Allwinner SoC A80 and A83T
This patch adds it on the Allwinner A80 SoC Device-tree.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Corentin Labbe [Fri, 25 Oct 2019 18:51:27 +0000 (20:51 +0200)]
ARM: dts: sun8i: a83t: Add Security System node
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms.
It could be found on Allwinner SoC A80 and A83T
This patch adds it on the Allwinner A83T SoC Device-tree.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Thierry Reding [Tue, 29 Oct 2019 11:25:45 +0000 (12:25 +0100)]
arm64: tegra: Add PMU on Tegra210
The NVIDIA Tegra210 contains an ARM PMU v3 that can be used to gather
statistics about the processors and their memory system. Add a device
tree node so that this functionality can be exposed.
Reported-by: William Cohen <giantklein@gmail.com> Tested-by: William Cohen <giantklein@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 27 Jun 2019 10:22:26 +0000 (12:22 +0200)]
arm64: tegra: p2888: Rename regulators for consistency
Some of the PMIC regulators had names that don't match the schematics.
Rename them so that it is easier to cross-reference with the hardware
documentation.
Thierry Reding [Fri, 28 Jun 2019 08:59:19 +0000 (10:59 +0200)]
arm64: tegra: Add SOR0_OUT clock on Tegra210
This clock was not previously used because it is a fixed clock. However,
adding it here allows operating systems to deal with SOR0 the same way
as SOR1.
Vidya Sagar [Sat, 5 Oct 2019 16:42:12 +0000 (22:12 +0530)]
arm64: tegra: Assume no CLKREQ presence by default
Although Tegra194 has support for CLKREQ sideband signal and P2972
has routing of the same till the slot, it is the case most of the time
that the connected device doesn't have CLKREQ support. Hence, it makes
sense to assume that there is no CLKREQ support by default and it can
be enabled on need basis when a card with CLKREQ support is connected.