Neil Armstrong [Tue, 6 Nov 2018 10:54:35 +0000 (11:54 +0100)]
drm/meson: Add support for VIC alternate timings
This change is an attempt to handle the alternate clock for the CEA mode.
60Hz vs. 59.94Hz, 30Hz vs 29.97Hz or 24Hz vs 23.97Hz on the Amlogic Meson SoC
DRM Driver pixel clock generation.
The actual clock generation will be moved to the Common Clock framework once
all the video clock are handled by the Amlogic Meson SoC clock driver,
then these alternate timings will be handled in the same time in a cleaner
fashion.
Neil Armstrong [Tue, 6 Nov 2018 09:35:09 +0000 (10:35 +0100)]
drm/meson: Add HDMI 1.4 4k modes
Add the timings for the HDMI 1.4 4K modes support :
- 3840x2160@30
- 3840x2160@25
- 3840x2160@24
Since the 297000Hz pixel clock is already managed and the modes are
compatible with the HDMI 1.4 current HDMI PHY+Controller support, only
the missing timings values needs to be added.
Daniel Vetter [Tue, 27 Nov 2018 09:19:21 +0000 (10:19 +0100)]
drm: Improve dumb callback docs
Noticed while reviewing a patch from Eric. Also add a todo for the
dumb_map_offset callbacks (it should be simple to do, but piles of
work). Plus fix up vbox, because vbox.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Fabio Rafael da Rosa <fdr@pid42.net> Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20181127091921.8325-1-daniel.vetter@ffwll.ch
drm/sun4i: Make pitch even for GEM dumb alloc as per hardware constraint
Our hardware requires the pitch to be an even number when using YUV
formats with the frontend. Implement a driver-specific callback for GEM
dumb allocation that sets the pitch accordingly.
Since only the bpp is passed (and not the format), we cannot really
distinguish if this alignment is really required. Since it doesn't hurt
to align the pitch anyway, always do it.
drm/sun4i: frontend: Apply format sub-sampling to CH1 dimensions
The frontend comes with two "channels", that can be configured
independently. When used in YUV mode, the first channel (CH0) represents
the luminance component while the second channel (CH1) represents the
chrominance. In RGB mode, both have to be configured the same way.
Use variables (with the YUV terminology) for each channel's
dimensions, calculating the chroma dimensions from the luma dimensions
and the sub-sampling factors from the format description.
Since the configured size only has pixel precision, the fractional
fixed-point part of the source size is dropped for both components to
ensure that the scaling factors are accurate.
drm/sun4i: backend: Detail the YUV to RGB values coding explanation
The values in the BT601 YUV to RGB colorspace translation are not
simply coded as multiples, but rather as fixed-point signed fractional
values on a given number of bits. Add an explanation about that.
drm/sun4i: frontend: Add support for the BGRX8888 input format
This introduces support for the BGRX8888 input format for the frontend,
with its associated pixel sequence value definition. Other fields are
already configured correctly as they no longer depend on the format's
fourcc directly.
drm/sun4i: frontend: Determine input mode based on the number of planes
Use the number of planes associated with the DRM format to determine the
input mode configuration instead of the format iteself. This way, the
helper can be used for all packed formats without future changes.
drm/sun4i: frontend: Add proper definitions for format registers
This introduces proper definitions for the input and output format
configuration registers instead of a macro and raw values in the code,
with the intent to increase code readability and reduce indirections.
drm/sun4i: frontend: Add helpers for input data mode and pixel sequence
This introduces new helpers for retrieving the input data mode and pixel
sequence register field values based on the DRM format instead of
hardcoding these. This makes it easier to add support for more formats.
drm/sun4i: frontend: Move CSC bypass setup to format update routine
In order to support YUV to RGB conversion with the frontend (which is
generally used for connecting with the backend), the CSC block must not
be bypassed.
As a result, the bit to enable CSC bypass is moved from the runtime
resume routine to the format update routine, so that it can disabled
when introducing support for YUV formats later.
drm/sun4i: Rename sun4i_backend_layer_formats to sun4i_layer_formats
Since more formats can be supported by the frontend, rename the
variable listing the layer formats to avoid suggesting that the backend
itself supports all the listed formats.
drm/sun4i: backend: Avoid counting YUV planes that use the frontend
Our hardware has a limited number of YUV planes (usually 1) that can be
supported using the backend only. However, YUV planes can also be
supported by the frontend and must then not be counted when checking for
that limitation.
Only count the YUV plane when the frontend is not used.
drm/sun4i: backend: Use a specific function to check if a plane is supported
Before this patch, it is assumed that a plane is supported either
through the frontend or through the backend alone. However, the DRM
interface does not allow finely reporting our hardware capabilities
and there are cases where neither are support.
In particular, some plane formats are supported by the backend and not
the frontend, so they can only be supported without scaling.
drm/sun4i: backend: Refine the logic behind using the frontend
Checking that scaling is in use is not sufficient as a condition to
decide to use the frontend.
Since not all layer formats are supported by the frontend, we need to
check for that support first. Then, the frontend must only be enabled
if the backend doesn't support the format or that scaling is required.
drm/sun4i: frontend: Add a helper and a list for supported formats
In order to check whether the frontend supports a specific format, an
explicit list and a related helper are introduced.
Just like in the backend, the prototype of the helper is added to the
frontend header so that it can be used later on. The helper is also
exported because it will be used outside of the frontend module.
drm/sun4i: Add TODO comment about supporting scaling with the backend
The backend allows integer-only scaling but can handle alpha components,
unlike the frontend. It could be useful to add support for this
eventually, so add a short TODO comment describing the situation.
drm/sun4i: frontend: Replace ARGB with XRGB as supported format
The frontend documentation (for the A33) mentions that ARGB is supported
as output, but with the alpha component always set to 0xff. In practice,
this means that the alpha component cannot be preserved when going
through the frontend. Since the information is lost, ARGB is not
properly supported.
As a result, expose the matching format supported by the frontend (both
for input and output) as XRGB instead of ARGB.
Since ARGB was the selected format for connecting the frontend to the
backend, change it to XRGB to reflect this as well.
The A31 and A80 SoCs apparently have a bit to enable proper alpha,
but this is not supported at this point (see the comment already in the
code).
drm/sun4i: Cleanup video/YUV source before enabling a layer
This adds a dedicated function for cleaning the video and YUV source
channel layer enable bits. This function is called first on layer atomic
update to make sure that there are no leftover bits from previous
plane configuration that were not cleaned until now.
It fixes issues when alternating between video and YUV planes, where
both bits would be set eventually, leading to broken plane display.
Ville Syrjälä [Thu, 22 Nov 2018 14:34:12 +0000 (16:34 +0200)]
drm/atomic-helper: WARN if fake_commit->hw_done is not completed as expected
For real commits we WARN if ->hw_done hasn't been completed by the time
drm_atomic_helper_commit_cleanup_done() is called. Let's do the same for
the fake commit.
Consider the following scenario:
1. nonblocking enable crtc
2. wait for the event
3. nonblocking disable crtc
On i915 this can lead to a spurious -EBUSY from step 3 on
account of non-enabled planes getting the fake_commit in step 1
and we don't complete the fake_commit-> flip_done until
drm_atomic_helper_commit_hw_done() which can happen a long
time after the flip event was sent out.
This will become somewhat easy to hit on SKL+ once we start
to add all the planes for the crtc to every modeset commit
for the purposes of forcing a watermark register programming
[1].
To make the race a little less pronounced let's complete
fake_commit->flip_done after drm_atomic_helper_wait_for_flip_done().
For the single crtc case this should make the race quite
theoretical, assuming drm_atomic_helper_wait_for_flip_done()
actually has to wait for the real commit flip_done. In case
the real commit flip_done gets completed singificantly before
drm_atomic_helper_wait_for_flip_done(), or we are dealing with
multiple crtcs whose vblanks don't line up nicely the race still
exists.
Noralf Trønnes [Wed, 21 Nov 2018 18:02:15 +0000 (19:02 +0100)]
drm/prime: Fix drm_gem_prime_mmap() stack use
drivers/gpu/drm/drm_prime.c: In function 'drm_gem_prime_mmap':
>> drivers/gpu/drm/drm_prime.c:688:1: warning: the frame size of 1592 bytes is larger than 1024 bytes [-Wframe-larger-than=]
Fix by allocating on the heap.
Fixes: 7698799f9554 ("drm/prime: Add drm_gem_prime_mmap()") Reported-by: kbuild test robot <lkp@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20181121180215.13881-1-noralf@tronnes.org
Qiang Yu [Thu, 22 Nov 2018 01:44:17 +0000 (09:44 +0800)]
drm/sun4i: wait on implicit fence before display
Render like lima will attach a fence to the framebuffer
dma_buf, display like sun4i should wait it finish before
show the framebuffer. Otherwise tearing will be observed.
Gerd Hoffmann [Tue, 30 Oct 2018 06:32:05 +0000 (07:32 +0100)]
virtio-gpu: add VIRTIO_GPU_F_EDID feature
The feature allows the guest request an EDID blob (describing monitor
capabilities) for a given scanout (aka virtual monitor connector).
It brings a new command message, which has just a scanout field (beside
the standard virtio-gpu header) and a response message which carries the
EDID data.
QEMU keeps a vram reference to the last QXLCursorCmd it received.
This QXLCursorCmd command points to a QXLCursor instance (stored in vram
too). However, while the QXLCursorCmd memory is pinned, the QXLCursor
memory is not.
When booting a recent Fedora to its login screen while monitoring the
QXLCursorCmd QEMU holds, it's possible to see the QXLCursor memory
becoming invalid shortly after boot. Pinning that memory ensures that
that QXLCursor memory is not going to be moved by the guest kernel.
Moving the pin/unpin to qxl_release_list_add()/qxl_release_free_list()
would be a more generic fix. However, doing this quickly exhausts QXL
video memory, so more fixing would be needed before this is workable.
YueHaibing [Thu, 15 Nov 2018 12:10:36 +0000 (12:10 +0000)]
drm/cirrus: Remove set but not used variable 'bo'
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/cirrus/cirrus_fbdev.c: In function 'cirrusfb_create':
drivers/gpu/drm/cirrus/cirrus_fbdev.c:172:20: warning:
variable 'bo' set but not used [-Wunused-but-set-variable]
It never used since introduction in commit f9aa76a85248 ("drm/kms: driver for virtual cirrus under qemu")
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
v7: Added is_yuv field initialization according to latest
drm_fourcc format structure initialization changes.
v8: Edited commit message to be more clear about skl+, renamed
PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
doesn't support per-pixel alpha. Fixed minor code issues.
v9: Moved DRM format check to proper place in intel_framebuffer_init.
v10: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888
v11: Fixed rebase conflict, caused by added new formats to drm-tip
meanwhile.
Noralf Trønnes [Sat, 10 Nov 2018 14:56:46 +0000 (15:56 +0100)]
drm/cma-helper: Add DRM_GEM_CMA_VMAP_DRIVER_OPS
This adds functionality to the CMA helper which ensures that the kernel
virtual address is set on the CMA GEM object also for imported buffers.
The drivers have been audited to ensure that none set ->vaddr on imported
buffers, making the conditional dma_buf_vunmap() call in
drm_gem_cma_free_object() safe.
Noralf Trønnes [Sat, 10 Nov 2018 14:56:45 +0000 (15:56 +0100)]
drm/gem: Add drm_gem_object_funcs
This adds an optional function table on GEM objects.
The main benefit is for drivers that support more than one type of
memory (shmem,vram,cma) for their buffers depending on the hardware it
runs on. With the callbacks attached to the GEM object itself, it is
easier to have core helpers for the the various buffer types. The driver
only has to make the decision about buffer type on GEM object creation
and all other callbacks can be handled by the chosen helper.
drm_driver->gem_prime_res_obj has not been added since there's a todo to
put a reservation_object into drm_gem_object.
v3: Add todo entry
v2: Drop drm_gem_object_funcs->prime_mmap in favour of
drm_gem_prime_mmap() (Daniel Vetter)
v1:
- drm_gem_object_funcs.map -> .prime_map let it only do PRIME mmap like
the function it superseeds (Daniel Vetter)
- Flip around the if ladders and make obj->funcs the first choice
highlighting the fact that this the new default way of doing it
(Daniel Vetter)
Quite obviously the driver depends on I2C_MUX, but adding a "depends on"
introduces a recursive dependency, therefore this patch selects I2C_MUX
instead.
Damian Kos [Tue, 6 Nov 2018 15:37:05 +0000 (15:37 +0000)]
drm/rockchip: fix for mailbox read size
Some of the functions (like cdn_dp_dpcd_read, cdn_dp_get_edid_block)
allow to read 64KiB, but the cdn_dp_mailbox_read_receive, that is
used by them, can read only up to 255 bytes at once. Normally, it's
not a big issue as DPCD or EDID reads won't (hopefully) exceed that
value.
The real issue here is the revocation list read during the HDCP
authentication process. (problematic use case:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.4/drivers/gpu/drm/rockchip/cdn-dp-reg.c#1152)
The list can reach 127*5+4 bytes (num devs * 5 bytes per ID/Bksv +
4 bytes of an additional info).
In other words - CTSes with HDCP Repeater won't pass without this
fix. Oh, and the driver will most likely stop working (best case
scenario).
Fabrizio Castro [Tue, 6 Nov 2018 11:52:36 +0000 (11:52 +0000)]
drm/bridge/sii902x: Fix EDID readback
While adding SiI9022A support to the iwg23s board, it came
up that when the HDMI transmitter is in pass through mode the
device is not compliant with the I2C specification anymore,
as it requires a far bigger tbuf, due to a delay the HDMI
transmitter is adding when relaying the STOP condition on the
monitor i2c side of things.
When not providing an appropriate delay after the STOP condition
the i2c bus would get stuck. Also, any other traffic on the bus
while talking to the monitor may cause the transaction to fail
or even cause issues with the i2c bus as well.
I2c-gates seemed to reach consent as a possible way to address
these issues, and as such this patch is implementing a solution
based on that. Since others are clearly relying on the current
implementation of the driver, this patch won't require any DT
changes.
Since we don't want any interference during the DDC Bus
Request/Grant procedure and while talking to the monitor, we
have to use the adapter locking primitives rather than the
i2c-mux locking primitives.
Linus Walleij [Thu, 1 Nov 2018 21:32:55 +0000 (22:32 +0100)]
drm/panel: Augment the TPO TPG110 bindings
The TPO TPG110 bindings were using the DPI bindings (popular
in the fbdev subsystem) but this misses the finer points
learned in the DRM subsystem.
We need to augment the bindings for proper DRM integration:
the timings are expressed by the hardware, not put into the
device tree. I.e. this hardware is self-describing and can
report the resolutions and timings needed. It should not
be described in the device tree.
Further the device was incorrectly modeled with GPIO lines
instead of an SPI child, even though the device was using
SPI.
No known deployments of the device using device tree
exist, so it should be fine to augment the bindings.
drm: panel-orientation-quirks: Do rotation quirk for new GPD Win2 FW
I just got a new GDP Win2 device with an updated firmware, which still
requires this quirk to get the rotation right, so add the new firmware
date to the quirk matching table.
YueHaibing [Mon, 12 Nov 2018 13:32:36 +0000 (13:32 +0000)]
drm/qxl: remove set but not used variables 'driver, qbo'
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/qxl/qxl_release.c: In function 'qxl_release_fence_buffer_objects':
drivers/gpu/drm/qxl/qxl_release.c:431:17: warning:
variable 'qbo' set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/qxl/qxl_release.c:430:24: warning:
variable 'driver' set but not used [-Wunused-but-set-variable]
'qbo' not used since commit f2c24b83ae90 ("drm/ttm: flip the switch, and convert
to dma_fence")
And 'driver' never used since introduction in 8002db6336dd ("qxl: convert qxl driver to proper use for reservations")
YueHaibing [Sat, 10 Nov 2018 03:44:46 +0000 (03:44 +0000)]
drm/qxl: remove set but not used variable 'map'
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/qxl/qxl_object.c: In function 'qxl_bo_kunmap_atomic_page':
drivers/gpu/drm/qxl/qxl_object.c:189:21: warning:
variable 'map' set but not used [-Wunused-but-set-variable]
Robert Foss [Mon, 12 Nov 2018 16:51:56 +0000 (17:51 +0100)]
drm/virtio: add in/out fence support for explicit synchronization
When the execbuf call receives an in-fence it will get the dma_fence
related to that fence fd and wait on it before submitting the draw call.
On the out-fence side we get fence returned by the submitted draw call
and attach it to a sync_file and send the sync_file fd to userspace. On
error -1 is returned to userspace.
VIRTGPU_EXECBUF_FENCE_FD_IN & VIRTGPU_EXECBUF_FENCE_FD_OUT
are supported at the simultaneously and can be flagged
for simultaneously.
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com> Signed-off-by: Robert Foss <robert.foss@collabora.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Link: http://patchwork.freedesktop.org/patch/msgid/20181112165157.32765-4-robert.foss@collabora.com Suggested-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Robert Foss [Mon, 12 Nov 2018 16:51:54 +0000 (17:51 +0100)]
drm/virtio: add virtio_gpu_alloc_fence()
Refactor fence creation, add fences to relevant GPU
operations and add cursor helper functions.
This removes the potential for allocation failures from the
cmd_submit and atomic_commit paths.
Now a fence will be allocated first and only after that
will we proceed with the rest of the execution.
Neil Armstrong [Tue, 6 Nov 2018 09:40:02 +0000 (10:40 +0100)]
drm/meson: Add primary plane scaling
This patch adds support for the Primary Plane scaling.
On the Amlogic GX SoCs, the primary plane is used as On-Screen-Display
layer on top of video, and it's needed to keep the OSD layer to a lower
size as the physical display size to :
- lower the memory bandwidth
- lower the OSD rendering
- lower the memory usage
This use-case is used when setting the display mode to 3840x2160 and the
OSD layer is rendered using the GPU. In this case, the GXBB & GXL cannot
work on more than 2000x2000 buffer, thus needing the OSD layer to be kept
at 1920x1080 and upscaled to 3840x2160 in hardware.
The primary plane atomic check still allow 1:1 scaling, allowing native
3840x2160 if needed by user-space applications.
Neil Armstrong [Tue, 6 Nov 2018 09:40:01 +0000 (10:40 +0100)]
drm/meson: move OSD scaler management into plane atomic update
In preparation to support the Primary Plane scaling, move the basic
OSD Interlace-Only scaler setup code into the primary plane atomic
update callback and handle the vsync scaler update like the overlay
plane scaling registers update.
Neil Armstrong [Tue, 6 Nov 2018 09:40:00 +0000 (10:40 +0100)]
drm/meson: Support Overlay plane for video rendering
The Amlogic Meson GX SoCs support an Overlay plane behind the primary
plane for video rendering.
This Overlay plane support various YUV layouts :
- YUYV
- NV12 / NV21
- YUV444 / 422 / 420 / 411 / 410
The scaler supports a wide range of scaling ratios, but for simplicity,
plane atomic check limits the scaling from x5 to /5 in vertical and
horizontal scaling.
The z-order is fixed and always behind the primary plane and cannot be changed.
The scaling parameter algorithm was taken from the Amlogic vendor kernel
code and rewritten to match the atomic universal plane requirements.
The video rendering using this overlay plane support has been tested using
the new Kodi DRM-KMS Prime rendering path along the in-review V4L2 Mem2Mem
Hardware Video Decoder up to 3840x2160 NV12 frames on various display modes.
YueHaibing [Sat, 10 Nov 2018 02:57:40 +0000 (02:57 +0000)]
drm/sti: remove set but not used variable 'priv'
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/sti/sti_crtc.c: In function 'sti_crtc_vblank_cb':
drivers/gpu/drm/sti/sti_crtc.c:255:22: warning:
variable 'priv' set but not used [-Wunused-but-set-variable]
It never used since introduction in
commit 9e1f05b28009 ("drm/sti: rename files and functions")
Chris Wilson [Mon, 12 Nov 2018 15:21:30 +0000 (15:21 +0000)]
drm/syncobj: Fix compilation following partial revert
We need to include the revert of commit 783195ec1cad ("drm/syncobj:
disable the timeline UAPI for now v2") along with undoing the change to
drm/i915.
Fixes: 131280a162e7 ("drm: Revert syncobj timeline changes.") Cc: Christian König <christian.koenig@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Eric Anholt <eric@anholt.net> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20181112152130.12275-1-chris@chris-wilson.co.uk
Eric Anholt [Thu, 8 Nov 2018 16:04:22 +0000 (08:04 -0800)]
drm: Revert syncobj timeline changes.
Daniel suggested I submit this, since we're still seeing regressions
from it. This is a revert to before 48197bc564c7 ("drm: add syncobj
timeline support v9") and its followon fixes.
Fixes this on first V3D testcase execution:
[ 48.767088] ============================================
[ 48.772410] WARNING: possible recursive locking detected
[ 48.777739] 4.19.0-rc6+ #489 Not tainted
[ 48.781668] --------------------------------------------
[ 48.786993] shader_runner/3284 is trying to acquire lock:
[ 48.792408] ce309d7f (&(&array->lock)->rlock){....}, at: dma_fence_add_callback+0x30/0x23c
[ 48.800714]
[ 48.800714] but task is already holding lock:
[ 48.806559] c5952bd3 (&(&array->lock)->rlock){....}, at: dma_fence_add_callback+0x30/0x23c
[ 48.814862]
[ 48.814862] other info that might help us debug this:
[ 48.821410] Possible unsafe locking scenario:
[ 48.821410]
[ 48.827338] CPU0
[ 48.829788] ----
[ 48.832239] lock(&(&array->lock)->rlock);
[ 48.836434] lock(&(&array->lock)->rlock);
[ 48.840640]
[ 48.840640] *** DEADLOCK ***
[ 48.840640]
[ 48.846582] May be due to missing lock nesting notation
[ 130.763560] 1 lock held by cts-runner/3270:
[ 130.767745] #0: 7834b793 (&(&array->lock)->rlock){-...}, at: dma_fence_add_callback+0x30/0x23c
[ 130.776461]
stack backtrace:
[ 130.780825] CPU: 1 PID: 3270 Comm: cts-runner Not tainted 4.19.0-rc6+ #486
[ 130.787706] Hardware name: Broadcom STB (Flattened Device Tree)
[ 130.793645] [<c021269c>] (unwind_backtrace) from [<c020db1c>] (show_stack+0x10/0x14)
[ 130.801404] [<c020db1c>] (show_stack) from [<c0c2c4b0>] (dump_stack+0xa8/0xd4)
[ 130.808642] [<c0c2c4b0>] (dump_stack) from [<c0281a84>] (__lock_acquire+0x848/0x1a68)
[ 130.816483] [<c0281a84>] (__lock_acquire) from [<c02835d8>] (lock_acquire+0xd8/0x22c)
[ 130.824326] [<c02835d8>] (lock_acquire) from [<c0c49948>] (_raw_spin_lock_irqsave+0x54/0x68)
[ 130.832777] [<c0c49948>] (_raw_spin_lock_irqsave) from [<c086bf54>] (dma_fence_add_callback+0x30/0x23c)
[ 130.842183] [<c086bf54>] (dma_fence_add_callback) from [<c086d4c8>] (dma_fence_array_enable_signaling+0x58/0xec)
[ 130.852371] [<c086d4c8>] (dma_fence_array_enable_signaling) from [<c086c00c>] (dma_fence_add_callback+0xe8/0x23c)
[ 130.862647] [<c086c00c>] (dma_fence_add_callback) from [<c06d8774>] (drm_syncobj_wait_ioctl+0x518/0x614)
[ 130.872143] [<c06d8774>] (drm_syncobj_wait_ioctl) from [<c06b8458>] (drm_ioctl_kernel+0xb0/0xf0)
[ 130.880940] [<c06b8458>] (drm_ioctl_kernel) from [<c06b8818>] (drm_ioctl+0x1d8/0x390)
[ 130.888782] [<c06b8818>] (drm_ioctl) from [<c03a4510>] (do_vfs_ioctl+0xb0/0x8ac)
[ 130.896187] [<c03a4510>] (do_vfs_ioctl) from [<c03a4d40>] (ksys_ioctl+0x34/0x60)
[ 130.903593] [<c03a4d40>] (ksys_ioctl) from [<c0201000>] (ret_fast_syscall+0x0/0x28)
Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/261044/
Boris Brezillon [Fri, 9 Nov 2018 10:26:32 +0000 (11:26 +0100)]
drm/vc4: ->x_scaling[1] should never be set to VC4_SCALING_NONE
For the YUV conversion to work properly, ->x_scaling[1] should never
be set to VC4_SCALING_NONE, but vc4_get_scaling_mode() might return
VC4_SCALING_NONE if the horizontal scaling ratio exactly matches the
horizontal subsampling factor. Add a test to turn VC4_SCALING_NONE
into VC4_SCALING_PPF when that happens.
The old ->x_scaling[0] adjustment is dropped as I couldn't find any
mention to this constraint in the spec and it's proven to be
unnecessary (I tested various multi-planar YUV formats with scaling
disabled, and all of them worked fine without this adjustment).
drm/sun4i: tcon: Support an active-low DE signal with RGB interface
Some panels need an active-low data enable (DE) signal for the RGB
interface. This requires flipping a bit in the TCON0 polarity register
when setting up the mode for the RGB interface.
Match the associated bus flag and use it to set the polarity inversion
bit for the DE signal when required.
drm/sun4i: tcon: Get the connector from the encoder in RGB setup
Features such as dithering and pixel data edge configuration currently
rely on the panel registered with the TCON driver. However, bridges are
also supported in addition to panels for RGB setup.
Instead of retrieving the connector from the panel, get it from the
encoder with the dedicated helper.
Even in the case of bridges, the connector is registered with the
encoder from our driver and is accessible when iterating connectors.
Ville Syrjälä [Thu, 1 Nov 2018 18:46:44 +0000 (20:46 +0200)]
drm/atomic: Use explicit old crtc state in drm_atomic_add_affected_planes()
Replace 'crtc->state' with the explicit old crtc state.
Actually it shouldn't matter whether we use the old or the new
crtc state here since any plane that has been removed from the
crtc since the crtc state was duplicated will have been added
to the atomic state already. That is, you can't call
drm_atomic_set_crtc_for_plane() without having the new
plane state already in hand.
Ville Syrjälä [Mon, 29 Oct 2018 18:34:52 +0000 (20:34 +0200)]
drm: Add drm_any_plane_has_format()
Add a function to check whether there is at least one plane that
supports a specific format and modifier combination. Drivers can
use this to reject unsupported formats/modifiers in .fb_create().
v2: Accept anyformat if the driver doesn't do planes (Eric)
s/planes_have_format/any_plane_has_format/ (Eric)
Check the modifier as well since we already have a function
that does both
v3: Don't do the check in the core since we may not know the
modifier yet, instead export the function and let drivers
call it themselves
Daniel Vetter [Mon, 5 Nov 2018 10:12:11 +0000 (11:12 +0100)]
drm/lease: look at ->universal_planes only once
It's lockless, and userspace might chance it underneath us. That's not
really a problem, all userspace gets is a slightly dysfunctional
lease with the current code. But this might change, and gcc might
decide to reload a few too many times, and then boom. So better safe
than sorry.
v2: Remove the now unused lessor_priv argument from validate_lease()
(Keith).
We do lockless access to these flags everywhere, and it's kinda not a
great idea to mix lockless and bitfields. Aside from that gcc isn't
generating great code for these.
If this ever becomes an issue size-wise, I think we need atomic_t here
and atomic bitflag ops.
Eric Anholt [Mon, 5 Nov 2018 23:01:10 +0000 (15:01 -0800)]
drm/syncobj: Fix oops on drm_syncobj_find_fence(file_priv, 0, ...).
This broke rendering on V3D, where we almost always have a 0
in-syncobj.
Signed-off-by: Eric Anholt <eric@anholt.net> Fixes: 48197bc564c7 ("drm: add syncobj timeline support v9") Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.kernel.org/patch/10669317/ Signed-off-by: Christian König <christian.koenig@amd.com>
Imre Deak [Mon, 5 Nov 2018 14:54:28 +0000 (16:54 +0200)]
drm/vgem: Fix typo in driver feature flags
Fix typo in struct field initializer.
Fixes: 3a6eb795641c ("drm/vgem: create a render node for vgem") Cc: Emil Velikov <emil.velikov@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181105145428.5590-1-imre.deak@intel.com
Emil Velikov [Fri, 26 Oct 2018 12:06:47 +0000 (13:06 +0100)]
drm/vgem: create a render node for vgem
VGEM doesn't do anything modeset specific, so in a way exposing a
primary node is 'wrong'. At the same time, we extensively use if for
creating dumb buffers, fences, prime fd <> handle imports/exports.
To the point that we explicitly annotate the vgem fence ioctls as
DRM_RENDER_ALLOW and have an IGT test which opens the render node.
Jernej Skrabec [Sun, 4 Nov 2018 18:26:59 +0000 (19:26 +0100)]
drm/sun4i: Add support for H6 HDMI PHY
H6 has Synopsys DWC HDMI 2.0 TX PHY.
There is no freely available documentation for it, only code found in
BSP kernel. However, judging by the code, PHY is very similar to older
Synopsys HDMI PHY described in i.MX6 documentation. Most registers seem
to be the same.
According to i.MX6 documentation, mpll settings are based on pixel clock
and are not specific to each SoC. Because of that, mpll table in this
commit is based on that documentation and not on BSP code. Other PHY
settings were derived from BSP PHY driver code.
Jernej Skrabec [Sun, 4 Nov 2018 18:26:58 +0000 (19:26 +0100)]
drm/sun4i: Add support for Synopsys HDMI PHY
Currently sun8i-hdmi-phy driver supports only custom PHYs connected to
DW HDMI controller. Since newest Allwinner SoCs have unmodified Synopsys
PHY, driver has to be reorganized to support them.
Variant structure is expanded to allow differentiation between custom
and Sysnopsys PHYs and to hold Synopsys PHY settings.
Since DW HDMI bridge platform data has different fields for custom and
Sysnopsys PHY, function sun8i_hdmi_phy_get_ops() is replaced with
sun8i_hdmi_phy_set_ops().
The Allwinner H6 SoC uses a v2.12a DesignWare HDMI controller, with
dedicated CEC and HDCP clocks added; the PHY connected is a standard
DesignWare HDMI PHY.
Jernej Skrabec [Sun, 4 Nov 2018 18:26:54 +0000 (19:26 +0100)]
drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock
It turns out that H6 HDMI BSP kernel driver doesn't change TMDS rate at
all. At this point it is not clear whether it is just not necessary or
it would cause some kind of issues.
Jernej Skrabec [Sun, 4 Nov 2018 18:26:53 +0000 (19:26 +0100)]
drm/sun4i: dw-hdmi: Make mode_valid function configurable
Since it is not possible to access sun8i-dw-hdmi driver private data
inside mode_valid function, make it configurable. That way different
versions of HDMI controllers can set different function, depending on
it's limitations.