Olof Johansson [Thu, 9 Jan 2014 08:07:32 +0000 (00:07 -0800)]
Merge branch 'qcom/drivers' into next/drivers
* qcom/drivers:
tty: serial: Limit msm_serial_hs driver to platforms that use it
mmc: msm_sdcc: Limit driver to platforms that use it
usb: phy: msm: Move mach dependent code to platform data
Stephen Boyd [Mon, 30 Dec 2013 21:15:29 +0000 (13:15 -0800)]
tty: serial: Limit msm_serial_hs driver to platforms that use it
The msm_serial_hs driver uses mach specific dma APIs. This is not
compatible with the multi-platform ARM effort. Let's only compile
this driver on MSM devices that are prepared to support it;
allowing the DT based MSM devices to enter the multi-platform ARM
build.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Stephen Boyd [Mon, 30 Dec 2013 21:15:28 +0000 (13:15 -0800)]
mmc: msm_sdcc: Limit driver to platforms that use it
The msm_sdcc driver uses mach specific dma APIs. This is not
compatible with the multi-platform ARM effort. Let's only compile
this driver on MSM devices that are prepared to support it,
allowing the DT based MSM devices to enter the multi-platform ARM
build.
Cc: Chris Ball <cjb@laptop.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Ivan T. Ivanov [Mon, 30 Dec 2013 21:15:27 +0000 (13:15 -0800)]
usb: phy: msm: Move mach dependent code to platform data
This patch fix compilation error when driver is compiled
in multi-platform builds.
drivers/built-in.o: In function `msm_otg_link_clk_reset':
./drivers/usb/phy/phy-msm-usb.c:314: undefined reference to `clk_reset'
./drivers/usb/phy/phy-msm-usb.c:318: undefined reference to `clk_reset'
Use platform data supplied reset handlers and adjust error
messages reported when reset sequence fail.
This is an intermediate step before adding support for reset
framework and newer targets.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Acked-by: Felipe Balbi <balbi@ti.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 4 Jan 2014 05:55:29 +0000 (21:55 -0800)]
Merge tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers
From Linus Walleij:
Some Integrator patches that matured for v3.14:
- Use PATCH_PHYS_TO_VIRT and AUTO_ZRELADDR.
- Support cascaded interrupts on the SIC.
- Complete clock implementation for the IM-PD1.
* tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
clk: versatile: fixup IM-PD1 clock implementation
clk: versatile: pass a name to ICST clock provider
ARM: integrator: pass parent IRQ to the SIC
irqchip: versatile FPGA: support cascaded interrupts from DT
ARM: integrator: Default enable ARM_PATCH_PHYS_VIRT, AUTO_ZRELADDR
Olof Johansson [Sat, 4 Jan 2014 05:43:05 +0000 (21:43 -0800)]
Merge tag 'sunxi-core-for-3.14' of https://github.com/mripard/linux into next/drivers
From Maxime Ripard:
Allwinner core changes for 3.14
This mostly adds the reset controller initialisation for the A31 and the SMP
operations for this SoC.
* tag 'sunxi-core-for-3.14' of https://github.com/mripard/linux:
ARM: sun6i: Add SMP support for the Allwinner A31
dt-bindings: fix example of allwinner interrupt controller
ARM: sunxi: Register the A31 reset IP in init_time
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
Linus Walleij [Fri, 22 Nov 2013 15:25:09 +0000 (16:25 +0100)]
clk: versatile: fixup IM-PD1 clock implementation
Register both VCO clocks, give per-logical module unique names
to the clocks so we can have several IM-PD1's connected (in
theory). Implement all the fixed-factor clocks as children of
VCO2.
Tested by using the UARTs and the PL181 MMC block on the IM-PD1,
works flawlessly.
Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 22 Nov 2013 10:30:05 +0000 (11:30 +0100)]
clk: versatile: pass a name to ICST clock provider
When we have more than one of these clocks in a system (such as
on the IM-PD1) we need a mechanism to pass a name for the clock.
Refactor to add this as an argument.
Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 4 Oct 2013 13:15:35 +0000 (15:15 +0200)]
irqchip: versatile FPGA: support cascaded interrupts from DT
The Versatile FPGA interrupt controller supports cascading interrupts,
i.e. that its output is connected to the input of another interrupt
controller. This makes it possible to pass a parent interrupt from
the device tree and print it in the boot log if applicable.
Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Olof Johansson [Thu, 2 Jan 2014 19:45:27 +0000 (11:45 -0800)]
Merge tag 'davinci-for-v3.14/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers
From Sekhar Nori:
DaVinci GPIO driver updates
---------------------------
This pull request contains updates to DaVinci GPIO driver and the
resultant platform code changes. The updates include DT-conversion and
changes to make the driver cross-platform ready.
* tag 'davinci-for-v3.14/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
gpio: davinci: don't create irq_domain in case of unbanked irqs
gpio: davinci: use chained_irq_enter/chained_irq_exit API
gpio: davinci: add OF support
gpio: davinci: remove unused variable intc_irq_num
gpio: davinci: convert to use irqdomain support.
gpio: introduce GPIO_DAVINCI kconfig option
gpio: davinci: get rid of DAVINCI_N_GPIO
gpio: davinci: use {readl|writel}_relaxed() instead of __raw_*
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Rohit Vaswani [Thu, 2 Jan 2014 18:17:31 +0000 (10:17 -0800)]
ARM: msm: Add support for APQ8074 Dragonboard
This patch adds basic board support for APQ8074 Dragonboard
which belongs to the Snapdragon 800 family.
For now, just support a basic machine with device tree.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
[olof: Split off SoC and board support in separate patches] Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Thu, 2 Jan 2014 18:57:05 +0000 (10:57 -0800)]
Merge tag 'renesas-sh-sci3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman:
Third Round of Renesas SH SCI Updates for v3.14
* Add Device Tree Support
* Remove platform data mapbase and irqs fields
* Remove platform data scbrr_algo_id field
* tag 'renesas-sh-sci3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
serial: sh-sci: Add OF support
serial: sh-sci: Add device tree bindings documentation
serial: sh-sci: Remove platform data mapbase and irqs fields
serial: sh-sci: Remove platform data scbrr_algo_id field
Olof Johansson [Thu, 2 Jan 2014 18:54:34 +0000 (10:54 -0800)]
Merge tag 'renesas-sh-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Renesas SH based SoC Updates for v3.14
* Global
- Don't set plat_sci_port scbrr_algo_id field
- Declare SCIF register base and IRQ as resources
* sh772[34] SoCs
- Set serial port sampling rate to 8 for SCIFA ports
(These are merged through arm-soc due to dependencies with the SCI platform data
rework done for shmobile)
* tag 'renesas-sh-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
sh: Don't set plat_sci_port scbrr_algo_id field
sh: sh772[34]: Set serial port sampling rate to 8 for SCIFA ports
sh: Declare SCIF register base and IRQ as resources
Stephen Boyd [Fri, 20 Dec 2013 19:09:17 +0000 (11:09 -0800)]
ARM: msm: Simplify ARCH_MSM_DT config
This doesn't need to be a def_bool y. Instead we can have every
DT supported platform select ARCH_MSM_DT and we achieve the same
thing with less chance of conflicts.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Rohit Vaswani [Fri, 20 Dec 2013 19:09:15 +0000 (11:09 -0800)]
ARM: msm: Add support for MSM8974 SoC
Add support for the Snapdragon 800 MSM8974 SoC, used on the Dragonboard
and others. Board support added in separate patch.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
[olof: split off SoC support in separate patch] Signed-off-by: Olof Johansson <olof@lixom.net>
Josh Cartwright [Fri, 20 Dec 2013 19:09:14 +0000 (11:09 -0800)]
ARM: msm: trout: fix uninit var warning
Fix the following warning when !CONFIG_MMC:
arch/arm/mach-msm/board-trout.c: In function 'trout_init':
arch/arm/mach-msm/board-trout.c:67:6: warning: unused variable 'rc' [-Wunused-variable]
int rc;
^
Also, while we're here, rework explicit printk(KERN_CRIT..) to use
pr_crit.
Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 29 Dec 2013 21:26:13 +0000 (13:26 -0800)]
Merge tag 'renesas-irqc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman:
Renesas ARM based SoC IRQC Driver Updates for v3.14
* Simplify irq_set_type() method
* Enable mask on suspend
* Use lazy disable
* tag 'renesas-irqc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
irq-renesas-irqc: simplify irq_set_type() method
irqchip: renesas-irqc: Enable mask on suspend
irqchip: renesas-irqc: Use lazy disable
Olof Johansson [Thu, 26 Dec 2013 19:00:13 +0000 (11:00 -0800)]
Merge tag 'tegra-for-3.14-trusted-foundations' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
From Stephen Warren:
ARM: tegra: Trusted Foundations firmware support
Add support for the Trusted Foundations secure-mode firmware, as found
on NVIDIA SHIELD. This allows Linux to run in non-secure mode on this
board; all previous Tegra support has assumed the kernel is running in
secure mode.
(The base TF support has been discussed back and forth a lot; for now
the most logical place for it seems to be under arch/arm, so we're adding
it here. We can move it out to a common location in the future if needed).
* tag 'tegra-for-3.14-trusted-foundations' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: support Trusted Foundations by default
ARM: tegra: set CPU reset handler using firmware
ARM: tegra: split setting of CPU reset handler
ARM: tegra: add support for Trusted Foundations
of: add Trusted Foundations bindings documentation
of: add vendor prefix for Trusted Logic Mobility
ARM: add basic support for Trusted Foundations
gpio: davinci: use chained_irq_enter/chained_irq_exit API
It's unsafe to call IRQ chip callbacks (.irq_mask/irq_unmask/irq_ack)
from chained IRQ handler directly. Because, Davinci GPIO block is used
by different SoCs, which, in turn, have different Main IRQ controllers
(Davinci - aintc, cp-intc; Keystone - arm-gic) which may introduce
diffrent set of IRQ chip callbacks. As result, call of
gpio_irq_handler() on Keysone will simply cause crash the system,
because ARM-GIC implements .irq_eoi() instead of .irq_ack().
Hence, fix it by using Kernel chained_irq_enter/chained_irq_exit APIs as
they are intended to handle exact such cases.
KV Sujith [Thu, 21 Nov 2013 18:15:29 +0000 (23:45 +0530)]
gpio: davinci: add OF support
This patch adds OF parser support for davinci gpio
driver and also appropriate documentation in gpio-davinci.txt
located at Documentation/devicetree/bindings/gpio/.
Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: KV Sujith <sujithkv@ti.com> Signed-off-by: Philip Avinash <avinashphilip@ti.com>
[prabhakar.csengg@gmail.com: simplified the OF code, removed
unnecessary DT property and also simplified
the commit message] Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
As the davinci-gpio driver is migrated to use irqdomain
there is no need to pass the irq base for the gpio driver.
This patch removes this variable from davinci_gpio_platform_data
and also the refrences from the machine file.
Lad, Prabhakar [Thu, 21 Nov 2013 18:15:27 +0000 (23:45 +0530)]
gpio: davinci: convert to use irqdomain support.
Convert the davinci gpio driver to use irqdomain support.
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
[grygorii.strashko@ti.com:
- switch to use one irq-domain per all GPIO banks
- keep irq_create_mapping() call in gpio_to_irq_banked() as it
simply transformed to irq_find_mapping() if IRQ mapping exist
already] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The compatible to Davinci GPIO HW block is used by other TI SoCs, like
Keystone, where GPIO support is declared as optional.
Hence, introduce GPIO_DAVINCI Kconfig option which will allow to enable
Davinci GPIO driver for Keystone SoCs when needed. At same time, kept
Davinci GPIO driver enabled for Davinci SoCs by default.
Since Davinci GPIO driver is moved to support gpiolib it has to use
ARCH_NR_GPIOS (can be configured using CONFIG_ARCH_NR_GPIO Kconfig
option) configuration instead of any mach/platform specific options.
Hence, replace private DAVINCI_N_GPIO with common ARCH_NR_GPIOS. This is
safe because default value for ARCH_NR_GPIOS=256 and maximum number of
supported GPIOs for Davinci is DAVINCI_N_GPIO=144.
More over, this is one of steps to re-use Davinci GPIO driver by other
mach/platform.
Lad, Prabhakar [Wed, 11 Dec 2013 17:52:07 +0000 (23:22 +0530)]
gpio: davinci: use {readl|writel}_relaxed() instead of __raw_*
This patch replaces the __raw_readl/writel with
{readl|writel}_relaxed(), Altough the code runs on ARMv5
based SOCs, changing this will help using code for other
use cases (like with big-endian machines).
Bastian Hecht [Fri, 6 Dec 2013 09:59:54 +0000 (10:59 +0100)]
serial: sh-sci: Add OF support
Extend the driver to with support for SCIx device tree bindings. A
minimal set of features is supported, additional properties can be added
later should the need to describe more device features arise.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
sh: sh772[34]: Set serial port sampling rate to 8 for SCIFA ports
SCIFA ports on sh7723 and sh7724 seem to use a sampling rate of half the
value specified in the datasheet. This is currently handled by a custom
baud rate calculation algorithm. The algorithm ID will be removed from
platform data, set the sampling rate directly instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Wolfram Sang [Wed, 18 Dec 2013 21:31:58 +0000 (22:31 +0100)]
arm: shmobile: r7s72100: add i2c clocks
Tested with RIIC2 on a genmai board. Others untested but hopefully
trivial enough to be added.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7790: Don't define SCIF platform data in an array
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7791: Don't define SCIF platform data in an array
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7778: Don't define SCIF platform data in an array
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r7s72100: Don't define SCIF platform data in an array
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a73a4: Don't define SCIF platform data in an array
The SCIF driver is transitioning to platform resources. Board code will
thus need to define an array of resources for each SCIF device. This is
incompatible with the macro-based SCIF platform data definition as an
array. Rework the macro to define platform data as individual
structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Computing the baud rate register value requires knowledge of the
hardware sampling rate. This information is currently encoded in a baud
rate calculation algorithm ID passed through platform data. However, it
can be derived from the port type directly in most cases.
Compute the sampling rate internally in the driver if the baud rate
calculation algorithm ID isn't specified, and allow platforms to
override the sampling rate through platform data in special cases (this
is only required for SCIFA ports on sh7723 and sh7724, the reason needs
to be investigated).
serial: sh-sci: Compute overrun_bit without using baud rate algo
The overrun bit index is a property of the hardware. It's currently
computed based on a different and unrelated hardware property, the baud
rate calculation algorithm. Compute it using hardware identification
information only.
serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
None of the fields is ever set by board code, and both of them are set
in the driver at probe time. Move them out of struct plat_sci_port to
struct sci_port.
serial: sh-sci: Support resources passed through platform resources
Memory and IRQ resources are currently passed to the driver through
platform data. Support passing them through the standard platform
resources mechanism instead. This deprecates platform data resources.
serial: sh-sci: Remove duplicate interrupt check in verify port op
The driver checks if the interrupt number is greater than nr_irqs and
returns an error in that case. The same check is already performed by
the caller, remove it.
Sergei Shtylyov [Sat, 14 Dec 2013 00:09:31 +0000 (03:09 +0300)]
irq-renesas-irqc: simplify irq_set_type() method
Value 0 of the sense selection field of CONFIG_n register means "disable event
detection" and serves in irqc_sense[] for marking the invalid values of the IRQ
type (by just omitting initializers). There is no need for INTC_IRQ_SENSE_VALID
and hence INTC_IRQ_SENSE() as all field values matching to the valid IRQ types
are non-zero anyway.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Olof Johansson [Sun, 22 Dec 2013 19:42:50 +0000 (11:42 -0800)]
Merge tag 'at91-drivers' of git://github.com/at91linux/linux-at91 into next/drivers
From Nicolas Ferre:
AT91 crypto drivers DT support:
- add DT to sha/des/aes existing drivers
- add DMA DT
- all documentation added to crypto/atmel-crypto.txt file
* tag 'at91-drivers' of git://github.com/at91linux/linux-at91:
crypto: atmel-sha - add sha information to the log
crypto: atmel-sha - add support for Device Tree
crypto: atmel-tdes - add support for Device Tree
crypto: atmel-aes - add support for Device Tree
Arnaud Ebalard [Thu, 19 Dec 2013 22:27:28 +0000 (23:27 +0100)]
rtc: Add support for Intersil ISL12057 I2C RTC chip
Intersil ISL12057 is an I2C RTC chip also supporting two alarms. This
patch only adds support for basic RTC functionalities (i.e. getting
and setting time). Tests have been performed on NETGEAR ReadyNAS 102
w/ startup/shutdown scripts, hwclock, ntpdate and openntpd.
Reviewed-by: Mark Brown <broonie@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Kevin Hilman [Fri, 20 Dec 2013 19:23:08 +0000 (11:23 -0800)]
Merge tag 'renesas-usb-r8a66597-hcd-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman:
Renesas USB r8a66597 HCD update for v3.14
Convert to clk_prepare/unprepare
* tag 'renesas-usb-r8a66597-hcd-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
usb: r8a66597-hcd: Convert to clk_prepare/unprepare
The koelsch board uses has an SH ethernet controller which uses a Micrel
phy. Select MICREL_PHY for koelsch if SH_ETH is enabled to make use of the
Micrel-specific phy driver rather than relying on the generic phy driver.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Laurent Pinchart [Wed, 11 Dec 2013 14:13:51 +0000 (15:13 +0100)]
ARM: shmobile: rcar-gen2: Initialize CCF before clock sources
When CONFIG_COMMON_CLOCK is enabled, call rcar_gen2_clocks_init() in the
timer init function to initialize the common clock framework before
initializing the clock sources. This will take care of clock
initialization when the r8a779[01] boards will be switched to
multiplatform kernels.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Maxime Ripard [Sun, 3 Nov 2013 09:30:13 +0000 (10:30 +0100)]
ARM: sun6i: Add SMP support for the Allwinner A31
The A31 is a quad Cortex-A7. Add the logic to use the IPs used to
control the CPU configuration and the CPU power so that we can bring up
secondary CPUs at boot.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Matias Bjorling [Tue, 10 Dec 2013 15:50:38 +0000 (16:50 +0100)]
null_blk: mem garbage on NUMA systems during init
For NUMA systems, initializing the blk-mq layer and using per node hctx.
We initialize submit queues to 1, while blk-mq nr_hw_queues is
initialized to the number of NUMA nodes.
This makes the null_init_hctx function overwrite memory outside of what
it allocated. In my case it lead to writing garbage into struct
request_queue's mq_map.
radeon_pm: fix oops in hwmon_attributes_visible() and radeon_hwmon_show_temp_thresh()
Since commit ec39f64bba34 ("drm/radeon/dpm: Convert to use
devm_hwmon_register_with_groups") radeon_hwmon_init() is using
hwmon_device_register_with_groups(), which sets `rdev' as a device
private driver_data, while hwmon_attributes_visible() and
radeon_hwmon_show_temp_thresh() are still waiting for `drm_device'.
Fix them by using dev_get_drvdata(), in order to avoid this oops: