Tom St Denis [Tue, 16 May 2017 14:22:00 +0000 (10:22 -0400)]
drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request()
Simplify the function by removing identical looking code blocks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ayyappa Chandolu [Fri, 12 May 2017 11:35:55 +0000 (17:05 +0530)]
drm/amd/display: Fix ASSR enablement on DP to EDP converter
ASSR mode is not enable when we connect eDP panel via DP to eDP converter.
connector_signal is coming as SIGNAL_TYPE_DISPLAY_PORT. Present code
ignoring panel_mode_edp for SIGNAL_TYPE_DISPLAY_PORT. Added checking
panel_mode_edp for all signals.
Signed-off-by: Ayyappa Chandolu <Ayyappa.Chandolu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 20:07:30 +0000 (16:07 -0400)]
drm/amd/display: Implement input gamma LUT
1. Implemented dcn10_ipp_program_input_lut(), following the existing
interface.
2. Added missing registers as needed
3. Change to REG_GET for *ram_select() funcs.
4. Removed gamma table init from DiagsDM::make_surface() for resolving
CRC errors. Reason: Legacy LUT will be deprecated soon for Raven in
favor of degamma/regamma.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 17:52:28 +0000 (13:52 -0400)]
drm/amd/display: Refactor use_lut() from dce110 to dce
use_lut() checks if the input surface's pixel format is compatible with
a 256 entry LUT. This function can be used across different versions and
not just dce11.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 17 May 2017 16:07:30 +0000 (12:07 -0400)]
drm/amd/display: Fix 5th display lightup on Vega10
- fixing bug in calculation of reg offset for D5VGA_CONTROL
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Unify loop for surface update and page flip.
Remove extra loop we have for page flips and do flips in same loop we do
for surface create/update.
Add documentation for synchronization between commits on different crtcs.
Rename function to have DM prefix.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 13:55:20 +0000 (09:55 -0400)]
drm/amd/display: Fix dcn10 cursor set position hang
Calling dcn10_cursor_set_position() before dcn10_cursor_set_attributes()
with invalid (0-value) attributes can cause the ASIC to hang. This fix
checks that address.quadpart is non-zero within set_position before calling
set_attributes.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Use dc_update_surfaces_for_stream for flip.
Today we use special interface for flip because of fear of cuncurency issues
over dc->current_ctx. This should be no longer an issue when flipping on
multiple CRTCs concurently since for fast update (as flip is) no new context
is created and the exsisitng is not destroyed. For full updates case when
removing or adding streams on once CRTC while flipping on another
Adding all current active CRTC's states to the atomic commit in
amdgpu_dm_atomic_check will garntee that any such full update commit
will wait for completion of any outstanding flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 15 May 2017 18:23:09 +0000 (14:23 -0400)]
drm/amd/display: Remove duplicate entry from log_mask
As pointed out by kbuild test robot and Julia Lawall.
CC: Julia Lawall <julia.lawall@lip6.fr> CC: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 5 May 2017 18:57:12 +0000 (14:57 -0400)]
drm/amd/display: DCE12 num_timing_generators should be 6
We should also use it to determine pipe count.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Mon, 8 May 2017 21:46:57 +0000 (17:46 -0400)]
drm/amd/display: single channel bandwidth verses dual channel bandwidth
DPM0, FCLK=MCLK, single channel bandwidth = dual channel bandwidth
for the rest of the DPM levels, single channel bandwidth = 1/2 dual channel bandwidth
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 27 Apr 2017 21:13:34 +0000 (17:13 -0400)]
drm/amd/display: Use MED update type if clip position changes
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 5 May 2017 20:33:11 +0000 (16:33 -0400)]
drm/amd/display: Add 64KB_S_T and 64KB_D_T swizzle mode.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Problem :
A race between two adjecent page flips makes the earlier one
to release an alocated frame buffer for the subsequent one -
since there are 2 frambuffer swapped back and forth between flips,
the 'new' fb of the later flip is actually the 'previous' fb for the earlier flip.
Fix:
Don't set fb->address = 0 in cleanup hook, this is unnecessery and
erases the newly cached adress that was set in prepare_fb of the second
flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 3 May 2017 18:21:37 +0000 (14:21 -0400)]
drm/amd/display: ifdef some code only needed for DCN
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Thu, 4 May 2017 18:09:09 +0000 (14:09 -0400)]
drm/amd/display: Implement support for backlight optimization
- Add functionality to get real hw backlight level as opposed to user
level, meaning the level that takes into account backlight ramping
over time and backlight reduction due to Varibright
- Add backlight optimization which allows for a second OS state
that is able to control ABM
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Thu, 4 May 2017 17:34:55 +0000 (13:34 -0400)]
drm/amd/display: Continue with stream enable if DP link training fails.
Not necessarily a fatal problem - some monitors will recover and show
the stream anyway if link training fails.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Tue, 2 May 2017 21:01:10 +0000 (17:01 -0400)]
drm/amd/display: do not set_mpc_tree if tree is already setup
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Wed, 3 May 2017 19:19:07 +0000 (15:19 -0400)]
drm/amd/display: use signal type to decide whether to set backlight
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leon Elazar [Fri, 24 Mar 2017 19:46:24 +0000 (15:46 -0400)]
drm/amd/display: Allow MPO on Raven
Signed-off-by: Leon Elazar <leon.elazar@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Wed, 3 May 2017 14:25:51 +0000 (10:25 -0400)]
drm/amd/display: Only apply ctx for specific surface.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: fix resume hang because of DP short pulse
There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.
This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 28 Apr 2017 13:56:08 +0000 (09:56 -0400)]
drm/amd/display: Disable cursor on video surface.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Thu, 27 Apr 2017 16:20:34 +0000 (12:20 -0400)]
drm/amd/display: Add support for FreeSync on eDP to module
Signed-off-by: Eric <eric.cook@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Tue, 25 Apr 2017 14:03:27 +0000 (10:03 -0400)]
drm/amd/display: Add function to set dither option
Signed-off-by: Ding Wang <Ding.Wang@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Wed, 26 Apr 2017 15:51:38 +0000 (11:51 -0400)]
drm/amd/display: Check for Zero Range in FreeSync Calc
-check for min/max range in freesync calculation and handle it accordingly
Signed-off-by: Eric <eric.cook@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Wed, 12 Apr 2017 19:29:13 +0000 (15:29 -0400)]
drm/amd/display: Define dithering options
Signed-off-by: Ding Wang <Ding.Wang@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sat, 22 Apr 2017 18:17:51 +0000 (14:17 -0400)]
drm/amd/display: decouple resource_pool from resource_context
to avoid null access in case res_ctx is used to access res_pool before it's fully constructed
also make it clear which function has dependency on resource_pool
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Tue, 18 Apr 2017 19:24:50 +0000 (15:24 -0400)]
drm/amd/display: FreeSync Auto Sweep Support
Implement core support to allow for FreeSync Auto Sweep to work
Signed-off-by: Eric Cook <Eric.Cook@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sun, 23 Apr 2017 14:46:02 +0000 (10:46 -0400)]
drm/amd/display: move tg_color to dc_hw_types
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Fri, 21 Apr 2017 14:55:01 +0000 (10:55 -0400)]
drm/amd/display: Make dc_link param const in set_drive_settings
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 21 Apr 2017 21:15:40 +0000 (17:15 -0400)]
drm/amd/display: USB-c DP-HDMI dongle shows garbage on Sony TV
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 21 Apr 2017 15:00:43 +0000 (11:00 -0400)]
drm/amd/display: Make sure v_total_min and max not less than v_total.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 18 Apr 2017 19:35:27 +0000 (15:35 -0400)]
drm/amd/display: set correct v_total_min and v_total_max for dce.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 18 Apr 2017 19:43:22 +0000 (15:43 -0400)]
drm/amd/display: Fix memory leak in post_update_surfaces
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Mon, 17 Apr 2017 23:02:19 +0000 (19:02 -0400)]
drm/amd/display: Block YCbCr formats for eDP. Revert previous change.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Wed, 12 Apr 2017 10:53:25 +0000 (16:23 +0530)]
drm/amd/display: make dc_commit_surfaces_to_stream() re-entrant
dc_commit_surfaces_to_stream() function currently
is handle's only one plane at a time.
This will not work if multiple planes have to be set to a crtc.
The functionality of dc_commit_surfaces_to_stream() with this patch
is slit into
1. Accumulate and initialise all the surfaces that needs to be
set to a crtc.
2. Update the intialised set of surfaces to the steam in one go.
Hence dc_commit_surfaces_to_stream() is renamed to init_surfaces().
Once all the planes requested by user space are initialised,
dc_commit_surfaces_to_stream() shall sequentially populates *updates,
*flip_addr, *plane_info and *scaling_info for all surfaces.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Chromium UI comes up, on both eDP & DP.
* 'new_surface_count' now changes as per user input for e.g for
all below run tests its 2, without this patch for the below
tests it used to be 1
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format YV12 --size 500x500
plane_test --format AR24 --size 500x50 -p --format YV12 --size 150x150
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768
Signed-off-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch populates the YUV surface configurations.
Tests: (On Chromium OS for Stoney Only)
builds without any errors.
Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:22:05 +0000 (11:22 -0400)]
drm/amd/display: Return context from validate_context
This will allow us to carry it from check to commit
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:15:14 +0000 (11:15 -0400)]
drm/amd/display: Move resource_validate_ctx_destruct to dc.h
This will be needed to clean up context once we add it to private
atomic state.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 22:57:05 +0000 (18:57 -0400)]
drm/amd/display: Copy ctx to current_context instead of assign
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 20:22:33 +0000 (16:22 -0400)]
drm/amd/display: pull commit_surfaces out of atomic_commit into helper function
This should make things simpler when we try to rework this later when we
pass validate_context from atomic_check to atomic_commit.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 21:05:53 +0000 (17:05 -0400)]
drm/amd/display: Get rid of temp_flip_context
If we need to update our context we can allocate memory.
No need to keep temporary memory for this.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 20:48:48 +0000 (16:48 -0400)]
drm/amd/display: Remove unused scratch_val_ctx
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Wed, 12 Apr 2017 15:05:08 +0000 (11:05 -0400)]
drm/amd/display: FreeSync LFC MIN/MAX update on current frame
- Update BTR/LFC logic so that V_TOTAL_MIN/MAX will take affect on current frame
- Add in FreeSync update to MPO code path
Signed-off-by: Eric Cook <Eric.Cook@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 12 Apr 2017 02:24:44 +0000 (22:24 -0400)]
drm/amd/display: use full surface update when stream is NULL
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Mon, 10 Apr 2017 18:02:23 +0000 (14:02 -0400)]
drm/amd/display: Fix for tile MST
- Set stream signal type to be SST when setting non-tile timing on MST
tiled display.
- Disable MST on sink after disabling MST link.
- Enable MST on sink before enabling MST link.
Signed-off-by: Ding Wang <Ding.Wang@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>