yangbo lu [Thu, 20 Apr 2017 06:58:29 +0000 (14:58 +0800)]
mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a
The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
yangbo lu [Wed, 26 Apr 2017 02:45:49 +0000 (10:45 +0800)]
mmc: sdhci-of-esdhc: poll ESDHC_CLOCK_STABLE bit with udelay
The loop to poll ESDHC_CLOCK_STABLE bit with mdelay would waste time
because the time to stabilize is much less than 1 ms. This patch is
to use udelay instead to avoid time wasting.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Hu Ziji [Fri, 28 Apr 2017 02:35:15 +0000 (10:35 +0800)]
mmc: sdhci-xenon: Fix default value of LOGIC_TIMING_ADJUST for eMMC5.0 PHY
The default value of LOGIC_TIMING_ADJUST register in eMMC 5.0 PHY is
different from that in eMMC 5.1 PHY. Set the specific value for that
register in eMMC 5.0 PHY.
Signed-off-by: Hu Ziji <huziji@marvell.com> Reported-by: Jisheng Zhang <jszhang@marvell.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Steven J. Hill [Mon, 24 Apr 2017 18:41:57 +0000 (13:41 -0500)]
mmc: cavium: Add MMC support for Octeon SOCs.
Add platform driver for Octeon SOCs.
Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Steven J. Hill [Mon, 24 Apr 2017 18:41:56 +0000 (13:41 -0500)]
mmc: cavium: Fix detection of block or byte addressing.
Use the mmc_card_is_blockaddr() function to properly detect if the
card uses byte or block addressing.
Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc: core: Export API to allow hosts to get the card address
Some hosts controllers, like Cavium, needs to know whether the card
operates in byte- or block-address mode. Therefore export a new API,
mmc_card_is_blockaddr(), which provides this information.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com>
The host may issue an I/O abort by writing to the CCCR at any time
during I/O read operation via CMD52. And host may need suspend
transcation during write busy stage in SDIO suspend/resume scenario.
>From other side, a card may accept CMD52 during data transfer phase.
Previous implement would block issuing above command in busy stage.
It cause function driver can't implement as proper way and has no
opportunity to do some coverage in error case via I/O abort etc.
We need bypass some necessary operation during busy check stage.
mmc: sdhci-esdhc-imx: reset tuning circuit when power on mmc card
USDHC tuning circuit should be reset before every time card enumeration
or re-enumeration.
SD3.0 card need tuning. For SDR104 card, when system suspend in standby
mode, and then resume back, the IO timing is still SDR104(tuned) which
may result in card re-enumeration fail in low card speed(400khz) for some
cards. And we did meet the issue that in certain probability, SDR104
card meet mmc command CRC/Timeout error when send CMD2 during mmc bus
resume.
This patch reset the tuning circuit when the ios timing is
MMC_TIMING_LEGACY/MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS, which means both
mmc_power_up() and mmc_power_off() will reset the tuning circuit.
trivial fix to spelling mistake in dev_warn message
Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Adrian Hunter [Thu, 20 Apr 2017 08:14:43 +0000 (16:14 +0800)]
mmc: sdhci: Control the delay between tuning commands
The delay between tuning commands for SD cards is not part of the
specification. A driver that needs it probably needs it for eMMC
too, whereas most drivers would probably like to set it to 0. Make
it a host member (host->tuning_delay) that defaults to the existing
behaviour. Drivers can set it to zero to eliminate the delay, or
set it to a positive value to always have a delay.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
yangbo lu [Thu, 20 Apr 2017 08:14:41 +0000 (16:14 +0800)]
mmc: sdhci-of-esdhc: add support for signal voltage switch
eSDHC supports signal voltage switch from 3.3v to 1.8v by
eSDHC_PROCTL[VOLT_SEL] bit. This bit changes the value of output
signal SDHC_VS, and there must be a control circuit out of eSDHC
to change the signal voltage according to SDHC_VS output signal.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
yangbo lu [Thu, 20 Apr 2017 08:14:40 +0000 (16:14 +0800)]
mmc: sdhci-of-esdhc: add peripheral clock support
eSDHC could select peripheral clock or platform clock as clock source by
the PCS bit of eSDHC Control Register, and this bit couldn't be reset by
software reset for all. In default, the platform clock is used. But we have
to use peripheral clock since it has a higher frequency to support eMMC
HS200 mode and SD UHS-I mode. This patch is to add peripheral clock support
and use it instead of platform clock if it's declared in eSDHC dts node.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jan Glauber [Thu, 13 Apr 2017 12:10:51 +0000 (14:10 +0200)]
mmc: cavium: Check pointer before de-reference
Add a pointer check to prevent this smatch warning:
drivers/mmc/host/cavium.c:803 cvm_mmc_request()
error: we previously assumed 'cmd->data' could be null (see line 782)
This is a theoretical fix because MMC_CMD_ADTC seems to imply
that cmd->data is not null. Nevertheless checking cmd->data
before using it improves readability.
Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc: meson-gx: add support for descriptor chain mode
So far a bounce buffer is used to serialize the scatterlist(s).
This overhead can be avoided by switching to descriptor chain mode.
As result the performance is drastically improved. On a Odroid-C2 with
a 128 GB eMMC module raw reads reach 140 MB/s.
Prerequisite for descriptor chain mode is that all scatterlist buffers
are 8 byte aligned for 64-bit DMA. That's not always the case, at least
the brcmfmac SDIO WiFi driver is known to cause problems.
Therefore, for each request, check upfront whether all scatterlist
buffers are 8 byte aligned and fall back to bounce buffer mode if
that's not the case.
mmc: meson-gx: add basic tuning for rx clock phase
This patch adds basic tuning which changes the rx clock phase only
until a working setting is found.
On a Odroid C2 with 128GB eMMC card and 200 MHz MMC clock only
180° rx clock phase make the system boot w/o CRC errors.
With other MMC devices / clock speeds this might be different,
therefore don't change the driver config in general.
When retuning skip the currently active parameter set. This avoids
the current problematic config to be chosen again if it causes CRC
errors just occasionally.
Introduce struct meson_tuning_params for storing the clock phase
configurations. There's no functional change because tx and rx
clock phase were implicitely set to CLK_PHASE_0 before.
Dan Carpenter [Mon, 10 Apr 2017 13:54:17 +0000 (16:54 +0300)]
mmc: host: omap_hsmmc: checking for NULL instead of IS_ERR()
devm_pinctrl_get() returns error pointers, it never returns NULL.
Fixes: 455e5cd6f736 ("mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on AM335x") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Hu Ziji [Thu, 30 Mar 2017 15:23:00 +0000 (17:23 +0200)]
mmc: sdhci-xenon: Add support to PHYs of Marvell Xenon SDHC
Marvell Xenon eMMC/SD/SDIO Host Controller contains PHY.
Multiple types of PHYs are supported.
Add support to multiple types of PHYs init and configuration.
Add register definitions of PHYs.
Xenon PHY cannot fit in kernel common PHY framework.
Xenon SDHC PHY register is a part of Xenon SDHC register set.
Besides, MMC initialization has to call several PHY functions to
complete timing setting.
Those PHY setting functions have to access SDHC registers and know
current MMC setting, such as bus width, clock frequency and
speed mode.
As a result, implement Xenon PHY in MMC host directory.
Add Xenon eMMC/SD/SDIO host controller core functionality.
Add Xenon specific initialization process.
Add Xenon specific mmc_host_ops APIs.
Add Xenon specific register definitions.
Add CONFIG_MMC_SDHCI_XENON support in drivers/mmc/host/Kconfig.
Marvell Xenon SDHC conforms to SD Physical Layer Specification
Version 3.01 and is designed according to the guidelines provided
in the SD Host Controller Standard Specification Version 3.00.
Gregory CLEMENT [Thu, 30 Mar 2017 15:22:54 +0000 (17:22 +0200)]
clk: apn806: Turn the eMMC clock as optional for dts backwards compatible
First version of the binding didn't have the eMMC clock. This patch
allows to not registering the eMMC clock if it is not present in the
device tree. Then the device tree can be backwards compatible.
clk: apn806: Add eMMC clock to system controller driver
Add fixed clock of 400MHz to system controller driver. This clock is
used as SD/eMMC clock source.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Omri Itach <omrii@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
[fixed up conflicts, added error handling --rmk] Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jan Glauber [Thu, 30 Mar 2017 15:31:28 +0000 (17:31 +0200)]
MAINTAINERS: Add entry for Cavium MMC driver
Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jan Glauber [Thu, 30 Mar 2017 15:31:24 +0000 (17:31 +0200)]
mmc: cavium: Add core MMC driver for Cavium SOCs
This core driver will be used by a MIPS platform driver
or by an ARM64 PCI driver. The core driver implements the
mmc_host_ops and slot probe & remove functions.
Callbacks are provided to allow platform specific interrupt
enable and bus locking.
The host controller supports:
- up to 4 slots that can contain sd-cards or eMMC chips
- 1, 4 and 8 bit bus width
- SDR and DDR
- transfers up to 52 Mhz (might be less when multiple slots are used)
- DMA read/write
- multi-block read/write (but not stream mode)
Voltage is limited to 3.3v and shared for all slots (vmmc and vmmcq).
A global lock for all MMC devices is required because the host
controller is shared.
Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jan Glauber [Thu, 30 Mar 2017 15:31:23 +0000 (17:31 +0200)]
dt-bindings: mmc: Add Cavium SOCs MMC bindings
Add description of Cavium Octeon and ThunderX SOC device tree bindings.
CC: Ulf Hansson <ulf.hansson@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Mark Rutland <mark.rutland@arm.com> CC: devicetree@vger.kernel.org Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc_wait_for_data_req_done() is called in exactly one place,
and having it spread out is making things hard to oversee.
Factor this function into mmc_finalize_areq().
Linus Walleij [Tue, 28 Mar 2017 08:40:29 +0000 (10:40 +0200)]
mmc: core: move some code in mmc_start_areq()
"previous" is a better name for the variable storing the previous
asynchronous request, better than the opaque name "data" atleast.
We see that we assign the return status to the returned variable
on all code paths, so we might as well just do that immediately
after calling mmc_finalize_areq().
Adrian Hunter [Mon, 13 Mar 2017 12:36:40 +0000 (14:36 +0200)]
mmc: block: Change mmc_apply_rel_rw() to get block address from the request
mmc_apply_rel_rw() will be used by Software Command Queuing also. In that
case the command argument is not the block address so change
mmc_apply_rel_rw() to get block address from the request.
Adrian Hunter [Mon, 13 Mar 2017 12:36:38 +0000 (14:36 +0200)]
mmc: mmc_test: Disable Command Queue while mmc_test is used
Normal read and write commands may not be used while the command queue is
enabled. Disable the Command Queue when mmc_test is probed and re-enable it
when it is removed.
Adrian Hunter [Mon, 13 Mar 2017 12:36:36 +0000 (14:36 +0200)]
mmc: queue: Share mmc request array between partitions
eMMC can have multiple internal partitions that are represented as separate
disks / queues. However switching between partitions is only done when the
queue is empty. Consequently the array of mmc requests that are queued can
be shared between partitions saving memory.
Keep a pointer to the mmc request queue on the card, and use that instead
of allocating a new one for each partition.
Adrian Hunter [Mon, 13 Mar 2017 12:36:35 +0000 (14:36 +0200)]
mmc: block: Introduce queue semantics
Change from viewing the requests in progress as 'current' and 'previous',
to viewing them as a queue. The current request is allocated to the first
free slot. The presence of incomplete requests is determined from the
count (mq->qcnt) of entries in the queue. Non-read-write requests (i.e.
discards and flushes) are not added to the queue at all and require no
special handling. Also no special handling is needed for the
MMC_BLK_NEW_REQUEST case.
As well as allowing an arbitrarily sized queue, the queue thread function
is significantly simpler.
Sergio Prado [Fri, 31 Mar 2017 23:50:55 +0000 (20:50 -0300)]
dt-bindings: mmc: add DT binding for S3C24XX MMC/SD/SDIO controller
Adds the device tree bindings description for Samsung S3C24XX
MMC/SD/SDIO controller, used as a connectivity interface with external
MMC, SD and SDIO storage mediums.
Heiner Kallweit [Sat, 25 Mar 2017 10:28:13 +0000 (11:28 +0100)]
mmc: meson-gx: add CMD23 mode
CMD23 mode (use "set block count" command before transferring multiple
data blocks) typically is more performant as host / card know upfront
how many data blocks to expect. Therefore add support for this mode to
the driver.
Heiner Kallweit [Sat, 25 Mar 2017 10:24:41 +0000 (11:24 +0100)]
mmc: meson-gx: use per port interrupt names
So far the driver name is used as interrupt description, therefore in
/proc/interrupts it's not possible to tell which interrupt belongs to
which port. Change this by switching to NULL what causes the default
(device name) to be used. In our case that's the DT node name.
Heiner Kallweit [Sat, 25 Mar 2017 10:23:24 +0000 (11:23 +0100)]
mmc: meson-gx: use bitfield macros
Use GENMASK consistently for all bit masks and switch to using the
bitfield macros FIELD_GET and FIELD_PREP. This hides parts of the
complexity of dealing with bit fields.
Shawn Lin [Fri, 24 Mar 2017 07:50:12 +0000 (15:50 +0800)]
mmc: sdhci: clarify the get_timeout_clock callback
Currently the get_timeout_clock callback doesn't clearly
have a statement that it needs the variant drivers to return
the timeout clock rate in kHz if the SDHCI_TIMEOUT_CLK_UNIT
isn't present, otherwise the variant drivers should return it
in MHz. It's also very likely that further variant drivers which
are going to use this callback will be confused by this situation.
Given the fact that moderm sdhci variant hosts are very prone to get
the timeout clock from common clock framework (actually the only three
users did that), it's more natural to return the value in Hz and we
make an explicit comment there. Then we put the unit conversion inside
the sdhci core. Thus will improve the code and prevent further misuses.
Reported-by: Anssi Hannula <anssi.hannula@bitwise.fi> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Icenowy Zheng [Thu, 16 Mar 2017 13:29:03 +0000 (21:29 +0800)]
mmc: sunxi: change controller error info to debug level
The controller's errors are usually normal (for example, for MMC or SDIO
cards, some errors are expected to happen; and for boards without a
dedicated card detect pin the error info will even flood console and
hide other normal messages) and hard to understand.
Change their print level to debug, thus it won't be shown to generic
users.
Heiner Kallweit [Wed, 22 Mar 2017 21:33:53 +0000 (22:33 +0100)]
mmc: meson-gx: improve setting data->bytes_xfered
Centralize setting data->bytes_xfered in one place and make sure
that the number of transfererd bytes is set only if we receive
the end-of-chain interrupt and there was no error.
yong mao [Wed, 15 Mar 2017 07:26:40 +0000 (15:26 +0800)]
mmc: mediatek: Use data tune for CMD line tune
If we don't select a set of better parameters for our emmc host,
It may easily occur CMD response CRC error. And also it may cause
cannot boot up issue.
Fot getting a set of better parameters, our emmc host supports
data tune mechanism.Therefore, our emmc driver also should change
to use data tune for CMD line.
Because our emmc host use the different clock source to sample the
CMD signal between HS200 and HS400 mode, the parameters are also
different between these two modes.
Separate cmd internal delay for HS200/HS400 mode.
This change can fix "System can not boot up" issue.
yong mao [Wed, 15 Mar 2017 07:26:38 +0000 (15:26 +0800)]
mmc: dt-bindings: update Mediatek MMC bindings
Add description for mediatek,hs200-cmd-int-delay
Add description for mediatek,hs400-cmd-int-delay
Add description for mediatek,hs400-cmd-resp-sel-rising
Signed-off-by: Yong Mao <yong.mao@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Heiner Kallweit [Wed, 22 Mar 2017 20:59:29 +0000 (21:59 +0100)]
mmc: sdio: improve mmc_io_rw_extended
Improve mmc_io_rw_extended a little:
- using DIV_ROUND_UP achieves the same but is better readable
- simplify code by using sg_set_buf
- simplify one statement by using -= operator
Current code gets number of taps only once and keeps the value. This is
not correct, we need to obtain it every time before executing tuning,
so remove the outer if-block.
Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
[wsa: extracted from a larger patch and reworded commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Thu, 16 Mar 2017 10:56:02 +0000 (11:56 +0100)]
mmc: tmio: always unmap DMA before waiting for interrupt
In the (maybe academical) case, we don't get a DATAEND interrupt after
DMA completed, we will wait endlessly for the completion to complete.
This is not bad per se, since we have a more generic completion tracking
a timeout. In that rare case, however, the DMA buffer will not get
unmapped and we have a leak. Reorder the code, so unmapping will always
take place.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Adrian Hunter [Mon, 20 Mar 2017 17:50:51 +0000 (19:50 +0200)]
mmc: sdhci-pci: Let suspend/resume callbacks replace default callbacks
The suspend / resume callbacks lack the flexibility to allow a device to
specify a different function entirely. Change them around so that device
functions are called directly and they in turn can call the default
implementations if needed.
Adrian Hunter [Mon, 20 Mar 2017 17:50:48 +0000 (19:50 +0200)]
mmc: sdhci-pci: Let devices define how to add the host
SDHCI provides more flexibility than simply calling sdhci_add_host(). Make
that available by allowing devices to specify their own ->add_host()
function.