Dave Airlie [Thu, 22 Mar 2018 20:19:27 +0000 (06:19 +1000)]
Merge tag 'drm-intel-next-fixes-2018-03-22' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
GVT regression fix that caused guest VM GPU hang.
Fix for race conditions in declaring GPU wedged (hit in CI).
* tag 'drm-intel-next-fixes-2018-03-22' of git://anongit.freedesktop.org/drm/drm-intel:
drm/i915/gvt: force to set all context control bits from guest
drm/i915/gvt: Update PDPs after a vGPU mm object is pinned.
drm/i915/gvt: Invalidate vGPU PPGTT mm objects during a vGPU reset.
drm/i915/kvmgt: Handle kzalloc failure
drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed"
drm/i915/gvt: Remove reduntant printing of untracked mmio
drm/i915/pmu: Work around compiler warnings on some kernel configs
drm/i915: Only call tasklet_kill() on the first prepare_reset
drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection
drm/i915/icl: do not save DDI A/E sharing bit for ICL
Dave Airlie [Thu, 22 Mar 2018 20:18:48 +0000 (06:18 +1000)]
Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next
A relative large set of various improvements for vmwgfx. Some of them
have been around for a while, some are relatively new, but functionality
should have been tested in our standalone repo.
* 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux:
drm/vmwgfx: Bump version patchlevel and date
drm/vmwgfx: use monotonic event timestamps
drm/vmwgfx: Unpin the screen object backup buffer when not used
drm/vmwgfx: Stricter count of legacy surface device resources
drm/vmwgfx: Use kasprintf
drm/vmwgfx: Get rid of the device-private suspended member
drm/vmwgfx: Improve on hibernation
drm/vmwgfx: Avoid pinning fbdev framebuffers
drm/vmwgfx: Fix multiple command buffer context use
drm/vmwgfx: Use the cpu blit utility for framebuffer to screen target blits
drm/vmwgfx: Add a cpu blit utility that can be used for page-backed bos
drm/ttm: Export the ttm_k[un]map_atomic_prot API.
drm/ttm: Clean up kmap_atomic_prot selection code
drm/vmwgfx: Cursor update fixes
drm/vmwgfx: Send the correct nonblock option for atomic_commit
drm/vmwgfx: Move the stdu vblank event to atomic function
drm/vmwgfx: Move screen object page flip to atomic function
drm/vmwgfx: Remove drm_crtc_arm_vblank_event from atomic flush
drm/vmwgfx: Move surface copy cmd to atomic function
drm/vmwgfx: Avoid iterating over display unit if crtc is available
Dave Airlie [Thu, 22 Mar 2018 20:16:51 +0000 (06:16 +1000)]
Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next
Changes this time mostly come down to:
- hook up the DRM GPU scheduler
- prep work for GC7000L support, to be completed in the next cycle
* 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux: (22 commits)
drm/etnaviv: bump HW job limit to 4
drm/etnaviv: etnaviv_sched: Staticize functions when possible
drm/etnaviv: add PTA handling to MMUv2
drm/etnaviv: add function to load the initial PTA state
drm/etnaviv: handle security states
drm/etnaviv: add security handling mode enum
drm/etnaviv: add hardware database
drm/etnaviv: add more minor features fields
drm/etnaviv: update hardware headers from rnndb
drm/etnaviv: add support for slave interface clock
drm/etnaviv: split out and optimize MMU fault dumping
drm/etnaviv: remove the need for a gpu-subsystem DT node
dt-bindings: etnaviv: add slave interface clock
drm/etnaviv: use correct format specifier for size_t
drm/etnaviv: replace hangcheck with scheduler timeout
drm/etnaviv: lock BOs after all other submit work is done
drm/etnaviv: move dependency handling to scheduler
drm/etnaviv: hook up DRM GPU scheduler
drm/etnaviv: track fences by IDR instead of seqno
drm/etnaviv: add missing major features field to debugfs
...
Arnd Bergmann [Tue, 16 Jan 2018 17:18:43 +0000 (18:18 +0100)]
drm/vmwgfx: use monotonic event timestamps
DRM_VMW_EVENT_FENCE_SIGNALED (struct drm_vmw_event_fence) and
DRM_EVENT_VBLANK (struct drm_event_vblank) pass timestamps in 32-bit
seconds/microseconds format.
As of commit c61eef726a78 ("drm: add support for monotonic vblank
timestamps"), other DRM drivers use monotonic times for drm_event_vblank,
but vmwgfx still uses CLOCK_REALTIME for both events, which suffers from
the y2038/y2106 overflow as well as time jumps.
For consistency, this changes vmwgfx to use ktime_get_ts64 as well,
which solves those problems and avoids the deprecated do_gettimeofday()
function.
This should be transparent to to user space, as long as it doesn't
compare the time against the result of gettimeofday().
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Thomas Hellstrom [Thu, 22 Mar 2018 09:35:18 +0000 (10:35 +0100)]
drm/vmwgfx: Unpin the screen object backup buffer when not used
We were relying on the pinned screen object backup buffer to be destroyed
when not used. But if we hold a copy of the atomic state, like when
hibernating, the backup buffer might not be destroyed since it's
refcounted by the atomic state. This causes us to hibernate with a
buffer pinned in VRAM.
Fix this by only having the buffer pinned when it is actually used by a
screen object.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Thu, 22 Mar 2018 09:34:00 +0000 (10:34 +0100)]
drm/vmwgfx: Stricter count of legacy surface device resources
For legacy surfaces, they were previously registered as device resources
when the driver resources were created. Since they are evictable we instead
register them as device resources once they are created on the device,
just like for guest-backed surfaces. This has implications during
hibernation where we can't hibernate with device resources active.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Deepak Rawat <drawat@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Himanshu Jha [Thu, 22 Mar 2018 09:33:03 +0000 (10:33 +0100)]
drm/vmwgfx: Use kasprintf
Use kasprintf instead of combination of kmalloc and sprintf. Also,
remove the local variables used for storing the string length as they
are not required now.
Thomas Hellstrom [Thu, 22 Mar 2018 09:30:19 +0000 (10:30 +0100)]
drm/vmwgfx: Get rid of the device-private suspended member
It was used to early block fbdev dirty processing. Replace it with an
unprotected check of the par->dirty.active field. While this might
race with the vmw_fb_off() function, we do a protected check later so
the race will at worst lead to grabbing and releasing a couple of locks.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Thu, 22 Mar 2018 09:26:37 +0000 (10:26 +0100)]
drm/vmwgfx: Improve on hibernation
Make it possible to hibernate also with masters that don't switch VT at
hibernation time. We save and restore modesetting state unless fbdev is
active and enabled at hibernation time.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Thu, 22 Mar 2018 09:19:01 +0000 (10:19 +0100)]
drm/vmwgfx: Avoid pinning fbdev framebuffers
fbdev framebuffers were previously pinned to be able to keep them mapped
across updates.
This commit introduces a mechanism that instead revalidates the map on
each update, keeping the map cached across updates. The cached map is torn
down if the underlying pages change. Typically on buffer object moves and
swapouts.
This should be nicer to the system when we have resource contention.
Testing done: Basic fbdev functionality under Fedora 27.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Deepak Rawat <drawat@vmware.com>
Thomas Hellstrom [Thu, 22 Mar 2018 09:15:23 +0000 (10:15 +0100)]
drm/vmwgfx: Fix multiple command buffer context use
The start / stop and preempt commands don't honor the context argument
but rather acts on all available contexts.
Also add detection for context 1 availability.
Note that currently there's no driver interface for submitting buffers
using the high-priority command queue (context 1).
Testing done:
Change the default context for command submission to 1 instead of 0,
verify basic desktop functionality including faulty command injection and
recovery.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Deepak Rawat <drawat@vmware.com>
Thomas Hellstrom [Tue, 16 Jan 2018 10:07:30 +0000 (11:07 +0100)]
drm/vmwgfx: Use the cpu blit utility for framebuffer to screen target blits
This blit was previously performed using two large vmaps, one of which
was teared down and remapped on each blit. Use the more resource-
conserving TTM cpu blit instead.
The blit is used in boundary-box computing mode which makes it possible
to minimize the bounding box used in host operations.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
Thomas Hellstrom [Tue, 16 Jan 2018 08:33:27 +0000 (09:33 +0100)]
drm/vmwgfx: Add a cpu blit utility that can be used for page-backed bos
The utility uses kmap_atomic() instead of vmapping the whole buffer
object. As a result there will be more book-keeping but on some
architectures this will help avoid exhausting vmalloc space and also
avoid expensive TLB flushes.
The blit utility also adds a provision to compute a bounding box of
changed content, which is very useful to optimize presentation speed
of ill-behaved applications that don't supply proper damage regions, and
for page-flips. The cost of computing the bounding box is not that
expensive when done in a cpu-blit utility like this.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
Thomas Hellstrom [Tue, 16 Jan 2018 08:12:05 +0000 (09:12 +0100)]
drm/ttm: Export the ttm_k[un]map_atomic_prot API.
It will be used by vmwgfx cpu blit.
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Brian Paul <brianp@vmware.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Thomas Hellstrom [Tue, 16 Jan 2018 08:02:03 +0000 (09:02 +0100)]
drm/ttm: Clean up kmap_atomic_prot selection code
Use helpers to perform the kmap_atomic_prot() functionality to
a) Avoid in-function ifdefs that violate the kernel coding policy,
b) Facilitate exporting the functionality.
This commit should not change any functionality.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Lucas Stach [Fri, 9 Mar 2018 13:29:26 +0000 (14:29 +0100)]
drm/etnaviv: bump HW job limit to 4
The current limit of 2 leads to some GPU idle times, as the usual
IRQ latency leads to up to 3 jobs getting signaled at once with some
standard workloads.
A larger HW job limit might lead to slightly worse QoS, but we accept
that to not sacrifice GPU throughput in the common case.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Thomas Hellstrom [Tue, 16 Jan 2018 07:54:30 +0000 (08:54 +0100)]
drm/vmwgfx: Cursor update fixes
Use drm_plane_helper_check_update also for the cursor plane.
Some applications, like gdm on gnome shell still uses cursor front-buffer
like rendering without notifying the kernel. We do need some kind of
noficiation, but work around this for now by updating the cursor image on
every cursor move.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
Deepak Rawat [Tue, 16 Jan 2018 07:48:09 +0000 (08:48 +0100)]
drm/vmwgfx: Send the correct nonblock option for atomic_commit
Page flip can be slow for vmwgfx in some cases, like need to do surface
copy to different surface or waiting for IN_FENCE_FD. Enabling
nonblocking commits for vmwgfx in case userspace request it.
Deepak Rawat [Tue, 16 Jan 2018 07:27:17 +0000 (08:27 +0100)]
drm/vmwgfx: Remove drm_crtc_arm_vblank_event from atomic flush
The function drm_crtc_arm_vblank_event should be used for the driver
which have vblank interrupt support. In case of vmwgfx we do not have
vblank interrupt.
Deepak Rawat [Tue, 16 Jan 2018 07:25:55 +0000 (08:25 +0100)]
drm/vmwgfx: Move surface copy cmd to atomic function
When display surface is different than the framebuffer surface, atomic
path do not copy the surface data. This commit moved the code to copy
surface from legacy to atomic path.
Deepak Rawat [Tue, 16 Jan 2018 07:24:17 +0000 (08:24 +0100)]
drm/vmwgfx: Avoid iterating over display unit if crtc is available
In case of page flip there is no need to iterate over all display unit
in the function "vmw_kms_helper_dirty". If crtc is available then
dirty commands is performed on that crtc only.
Core Changes:
drm_print: More object size reductions (Joe)
Driver Changes:
vc4: Fix alpha blending on bottom plane (Stefan)
panel: Add Raydium RM68200 panel support (Phillipe)
panel: Add AUO G104SN02 V2 panel support (Christoph)
panel: Add KEO TX31D200VM0BAA panel support (Jagan)
vga_switcheroo: Use device link to bookkeep HDA runtime pm (Lukas)
rockchip: More CrOS kevin patches trickling in (various
sun4i: Add A80 support (Chen-Yu)
sun4i: Add YUV plane support (Maxime)
meson: Multiple (mostly error-path) fixups (Christophe/Wei)
Cc: Stefan Schake <stschake@gmail.com> Cc: Philippe CORNU <philippe.cornu@st.com> Cc: jan.tuerk@emtrion.com Cc: Christoph Fritz <chf.fritz@googlemail.com> Cc: Jagan Teki <jagannadh.teki@gmail.com> Cc: Lukas Wunner <lukas@wunner.de> Cc: Joe Perches <joe@perches.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Cc: Wei Yongjun <weiyongjun1@huawei.com>
* tag 'drm-misc-next-2018-03-21' of git://anongit.freedesktop.org/drm/drm-misc: (70 commits)
drm/qxl: Replace drm_gem_object_reference/unreference() with _get/put()
drm/meson: Fix potential NULL dereference in meson_drv_bind_master()
drm/sun4i: backend: Support YUV planes
drm/sun4i: backend: Check that we only have a single YUV plane
drm/sun4i: Add driver support for A80 display pipeline
drm/sun4i: Add compatible strings for the A80 display pipeline
drm/sun4i: Add support for A80 TCONs
drm/sun4i: Add DT binding for Detail Enhancement Unit in Allwinner A80 SoC
drm/sun4i: Add compatible strings for A80 TCONs
drm: Reduce object size of DRM_DEV_<LEVEL> uses
drm/doc: Put all driver docs into a separate chapter
drm: dma_bufs: Fixed checkpatch issues
drm: remove drm_mode_object_{un/reference} aliases
drm: Add PSR version 3 macro
drm/vc4_validate: Remove VLA usage
drm: Make drm_mode_vrefresh() a bit more accurate
drm: Nuke the useless 'ret' variable from drm_mode_convert_umode()
drm/i915: Use drm_color_lut_size()
drm/i915: Remove the blob->data casts
drm: Introduce drm_color_lut_size()
...
Joonas Lahtinen [Wed, 21 Mar 2018 14:25:15 +0000 (16:25 +0200)]
Merge tag 'gvt-next-fixes-2018-03-20' of https://github.com/intel/gvt-linux into drm-intel-next-fixes
gvt-next-fixes-2018-03-20
- No need warning on untracked regs (Colin)
- Error handling fix for dma unmap (Changbin)
- invalidate shadow ppgtt for vGPU reset (Zhi)
- ensure to update shadow ppgtt after pinned (Zhi)
- force guest ctx ctrl update for sanity (Zhenyu/Xiong)
- one typo fix (Colin)
drm/qxl: Replace drm_gem_object_reference/unreference() with _get/put()
Replace drm_gem_object_reference/unreference function with *_get/put()
suffixes, because it is shorter and consistent with the kernel
kref_get/put() functions. The following Coccinelle script was used:
Dave Airlie [Wed, 21 Mar 2018 04:07:03 +0000 (14:07 +1000)]
Merge tag 'omapdrm-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next
omapdrm patches for v4.17
* Fix sparse warnings from omapdrm
* HPD support for DVI connector
* Big cleanup to remove static variables
* tag 'omapdrm-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (69 commits)
drm/omap: fix compile error when DPI is disabled
drm/omap: fix compile error when debugfs is disabled
drm: omapdrm: displays: panel-dsi-cm: Fix field access before set
drm/omap: cleanup color space conversion
drm/omap: Allow HDMI audio setup even if we do not have video configured
drm/omap: fix maximum sizes
drm/omap: add writeback funcs to dispc_ops
drm/omap: fix scaling limits for WB
drm/omap: fix WB height with interlace
drm/omap: fix WBDELAYCOUNT with interlace
drm/omap: fix WBDELAYCOUNT for HDMI
drm/omap: set WB channel-in in wb_setup()
drm/omap: Add pclk setting case when channel is DSS_WB
drm/omap: dispc: disp_wb_setup to check return code
drm/omap: remove leftover enums
dt-bindings: display: add HPD gpio to DVI connector
drm/omap: add HPD support to connector-dvi
drm/omap: Init fbdev emulation only when we have displays
drm/omap: cleanup fbdev init/free
drm/omap: fix omap_fbdev_free() when omap_fbdev_create() wasn't called
...
Dave Airlie [Wed, 21 Mar 2018 04:06:00 +0000 (14:06 +1000)]
Merge tag 'drm-msm-next-2018-03-20' of git://people.freedesktop.org/~robclark/linux into drm-next
Updates for 4.17. Sorry, running a bit late on this, didn't have a
chance to send pull-req before heading to linaro. But it has all been
in linux-next for a while. Main updates:
+ DSI updates from 10nm / SDM845
+ fix for race condition with a3xx/a4xx fence completion irq
+ some refactoring/prep work for eventual a6xx support (ie. when we have
a userspace)
+ a5xx debugfs enhancements
+ some mdp5 fixes/cleanups to prepare for eventually merging writeback
support (ie. when we have a userspace)
* tag 'drm-msm-next-2018-03-20' of git://people.freedesktop.org/~robclark/linux: (36 commits)
drm/msm: fix building without debugfs
drm/msm/mdp5: don't pre-reserve LM's if no dual-dsi
drm/msm/mdp5: add missing LM flush bits
drm/msm/mdp5: print a bit more of the atomic state
drm/msm/mdp5: rework CTL START signal handling
drm/msm: Trigger fence completion from GPU
drm/msm/dsi: fix direct caller of msm_gem_free_object()
drm/msm: strip out msm_fence_cb
drm/msm: rename mdp->disp
drm/msm/dsi: Fix potential NULL pointer dereference in msm_dsi_modeset_init
drm/msm/adreno/a5xx_debugfs: fix potential NULL pointer dereference
drm/msm/dsi: Get byte_intf_clk only for versions that need it
drm/msm/adreno: Use generic function to load firmware to a buffer object
drm/msm/adreno: Define a list of firmware files to load per target
drm/msm/adreno: Rename gpmufw to powerfw
drm/msm: Pass the correct aperture end to drm_mm_init
drm/msm/gpu: Set number of clocks to 0 if the list allocation fails
drm/msm: Replace gem_object deprecated functions
drm/msm/hdmi: fix semicolon.cocci warnings
drm/msm/mdp5: Fix trailing semicolon
...
Dave Airlie [Wed, 21 Mar 2018 04:04:38 +0000 (14:04 +1000)]
Merge tag 'drm/tegra/for-4.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v4.17-rc1
This fixes mmap() for fbdev devices by providing a custom implementation
based on the KMS variant. This is a fairly exotic case these days, hence
why it is not flagged for stable.
There is also support for dedicating one of the overlay planes to serve
as a hardware cursor on older Tegra that did support hardware cursors
but not RGBA formats for it.
Planes will now also export the IN_FORMATS property by supporting the
various block-linear tiling modifiers for RGBA pixel formats.
Other than that, there's a bit of cleanup of DMA API abuse, use of the
private object infrastructure for global state (rather than subclassing
atomic state objects) and an implementation of ->{begin,end}_cpu_access
callbacks for PRIME exported buffers, which allow users to perform cache
maintenance on these buffers.
* tag 'drm/tegra/for-4.17-rc1' of git://anongit.freedesktop.org/tegra/linux:
drm/tegra: prime: Implement ->{begin,end}_cpu_access()
drm/tegra: gem: Map pages via the DMA API
drm/tegra: hub: Use private object for global state
drm/tegra: fb: Properly support linear modifier
drm/tegra: plane: Support format modifiers
drm/tegra: dc: Dedicate overlay plane to cursor on older Tegra's
drm/tegra: plane: Make tegra_plane_get_overlap_index() static
drm/tegra: fb: Implement ->fb_mmap() callback
drm/tegra: gem: Make __tegra_gem_mmap() available more widely
drm/tegra: gem: Reshuffle declarations
Dave Airlie [Wed, 21 Mar 2018 03:58:43 +0000 (13:58 +1000)]
Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next
I have accumulated some patches as we went through some internal testing
for mali-dp and I was waiting for the YUV2RGB patches to land in your
tree.
* 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld:
drm: mali-dp: Add YUV->RGB conversion support for video layers
drm: mali-dp: Turn off CRTC vblank when removing module.
drm: arm: malidp: Use drm_atomic_helper_shutdown() to disable planes on removal
drm: arm: malidp: Don't destroy planes manually in error handlers
drm/mali-dp: Fix malidp_atomic_commit_hw_done() for event sending.
drm/arm/malidp: Disable pixel alpha blending for colors that do not have alpha
drm: mali-dp: Fix bug on scaling with rotation
drm/mali-dp: Don't enable scaling engine for planes that only rotate.
drm: mali-dp: Uninitialized variable in malidp_se_check_scaling()
drm/mali-dp: Align pitch size to be multiple of bus burst read size.
drm/mali-dp: Rotated planes need a larger pitch size.
Dave Airlie [Wed, 21 Mar 2018 01:46:05 +0000 (11:46 +1000)]
Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
- Continued cleanup and restructuring of powerplay
- Fetch VRAM type from vbios rather than hardcoding for SOC15 asics
- Allow ttm to drop its backing store when drivers don't need it
- DC bandwidth calc updates
- Enable DC backlight control pre-DCE11 asics
- Enable DC on all supported asics
- DC Fixes for planes due to the way our hw is ordered vs what drm expects
- DC CTM/regamma fixes
- Misc cleanup and bug fixes
* 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (89 commits)
amdgpu/dm: Default PRE_VEGA ASIC support to 'y'
drm/amd/pp: Remove the cgs wrapper for notify smu version on APU
drm/amd/display: fix dereferencing possible ERR_PTR()
drm/amd/display: Refine disable VGA
drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel
drm/radeon: Don't turn off DP sink when disconnected
drm/amd/pp: Rename file name cz_* to smu8_*
drm/amd/pp: Replace function/struct name cz_* with smu8_*
drm/amd/pp: Remove unneeded void * casts in cz_hwmgr.c/cz_smumgr.c
drm/amd/pp: Mv cz uvd/vce pg/dpm functions to cz_hwmgr.c
drm/amd/pp: Remove dead header file pp_asicblocks.h
drm/amd/pp: Delete dead code on cz_clockpowergating.c
drm/amdgpu: Call amdgpu_ucode_fini_bo in amd_powerplay.c
drm/amdgpu: Remove wrapper layer of smu ip functions
drm/amdgpu: Don't compared ip_block_type with ip_block_index
drm/amdgpu: Plus NULL function pointer check
drm/amd/pp: Move helper functions to smu_help.c
drm/amd/pp: Replace rv_* with smu10_*
drm/amd/pp: Fix function parameter not correct
drm/amd/pp: Add rv_copy_table_from/to_smc to smu backend function table
...
Wei Yongjun [Tue, 20 Mar 2018 14:20:30 +0000 (14:20 +0000)]
drm/meson: Fix potential NULL dereference in meson_drv_bind_master()
platform_get_resource_byname() may fail and return NULL, so we should
better check it's return value to avoid a NULL pointer dereference
a bit later in the code.
This is detected by Coccinelle semantic patch.
@@
expression pdev, res, n, t, e, e1, e2;
@@
res = platform_get_resource_byname(pdev, t, n);
+ if (!res)
+ return -EINVAL;
... when != res == NULL
e = devm_ioremap(e1, res->start, e2);
Maxime Ripard [Thu, 1 Mar 2018 19:18:46 +0000 (20:18 +0100)]
drm/sun4i: backend: Support YUV planes
Now that we have the guarantee that we will have only a single YUV plane,
actually support them. The way it works is not really straightforward,
since we first need to enable the YUV mode in the plane that we want to
setup, and then we have a few registers to setup the YUV buffer and
parameters.
We also need to setup the color correction to actually have something
displayed.
Chen-Yu Tsai [Thu, 15 Mar 2018 11:41:31 +0000 (19:41 +0800)]
drm/sun4i: Add support for A80 TCONs
The Allwinner A80 SoC has 2 documented TCONs. The display pipeline
diagram from the user manual shows a third TCON, but it's missing
an interrupt line, and its registers are not explained either.
It's also not used in Allwinner's vendor BSP.
The first TCON only has channel 0, for LCD panel output. The TCON
hardware setup is peculiar in that the eDP reset must also be
deasserted to allow access to the TCON. How the eDP module is wired
in the SoC itself is never explained.
The second TCON only has channel 1, and its output is connected to
the HDMI encoder block.
This patch adds a "needs_edp_reset" field to the tcon quirks structure,
and adds quirks and compatible strings for the 2 documented TCONs.
Chen-Yu Tsai [Thu, 15 Mar 2018 11:41:30 +0000 (19:41 +0800)]
drm/sun4i: Add DT binding for Detail Enhancement Unit in Allwinner A80 SoC
The display pipeline on the A80 SoC has what is called the Detail
Enhancement Unit, or DEU for short, block in between the display
frontend and backend. This unit can sharpen images in both luma
and chroma channels. It seems to also do colorspace conversion.
This patch adds the device tree binding for this hardware block.
Chen-Yu Tsai [Thu, 15 Mar 2018 11:41:29 +0000 (19:41 +0800)]
drm/sun4i: Add compatible strings for A80 TCONs
The A80 has 2 or 3 TCONs. The documentation and vendor kernel are very
vague about the third TCON, to the point that it might not exist.
In the documentation, the first TCON is missing channel 1, and the
second is missing channel 0. However the vendor kernel seems to be
able to use them regardless. Here we model them like the old TCONs.
An oddity is that TCON0 requires the reset control for the eDP block
to be deasserted, for any register access to stick.
This patch adds compatible strings for TCON0 and TCON1, with TCON0
requiring an extra "edp" reset control.
Joe Perches [Fri, 16 Mar 2018 20:56:27 +0000 (13:56 -0700)]
drm: Reduce object size of DRM_DEV_<LEVEL> uses
These macros are similar to the DRM_<LEVEL> with the addition
of a struct device * to the arguments.
Convert the single drm_dev_printk function into 2 separate functions.
drm_dev_printk with a KERN_<LEVEL> * for generic use and drm_dev_dbg
for conditional masked use.
Remove the __func__ argument and use __builtin_return_address(0) to be
similar to the DRM_<LEVEL> macros uses.
Convert the DRM_DEV_<LEVEL> macros to remove now unnecessary arguments
and use a consistent style.
These macros are rarely used in the generic gpu/drm code so the code
size does not change much for a defconfig, but when more drivers are
enabled, there is ~4k savings.
Daniel Vetter [Fri, 16 Mar 2018 07:59:26 +0000 (08:59 +0100)]
drm/doc: Put all driver docs into a separate chapter
We have quite a few driver docs now, which is great, but having them
all in the top-level gpu documentation chapter makes it harder to spot
the core/shared bits.
Stuff them into a separate chapter and ecourage people to add even
more!
This patch remove the compatibility aliases
drm_mode_object_{reference/unreference} of drm_mode_object_{get/put}
since all callers have been converted to the prefered _{get/put}.
Remove the helpers from the semantic patch drm-get-put-cocci.
Arnd Bergmann [Mon, 26 Feb 2018 09:49:26 +0000 (10:49 +0100)]
drm/msm: fix building without debugfs
The adreno driver stopped building when CONFIG_DEBUGFS is disabled:
drivers/gpu/drm/msm/adreno/adreno_device.c: In function 'adreno_load_gpu':
drivers/gpu/drm/msm/adreno/adreno_device.c:153:16: error: 'const struct msm_gpu_funcs' has no member named 'debugfs_init'
if (gpu->funcs->debugfs_init) {
^~
drivers/gpu/drm/msm/adreno/adreno_device.c:154:13: error: 'const struct msm_gpu_funcs' has no member named 'debugfs_init'
gpu->funcs->debugfs_init(gpu, dev->primary);
^~
This adds an #ifdef around the code that references the hidden
pointer.
Fixes: 331dc0bc195b ("drm/msm: add a5xx specific debugfs") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 19 Feb 2018 13:17:06 +0000 (08:17 -0500)]
drm/msm/mdp5: rework CTL START signal handling
For DSI cmd-mode and writeback, we need to write the CTL's START
register to kick things off, but we only want to do that once both
the encoder and the crtc have a chance to write their corresponding
flush bits. The difficulty is that when there is a full modeset
(ie. encoder state has changed) we want to defer the start until
encoder->enable(). But if only plane's have changed, we want to do
this from crtc->commit().
The start_mask was a previous attempt to handle this, but it didn't
really do the right thing since atomic conversion.
Instead track in the crtc state that the start should be deferred,
set to try from encoder's (or in future writeback's) atomic_check().
This way the state is part of the atomic state, and rollback can
work properly if an atomic test fails.
Bjorn Andersson [Wed, 14 Feb 2018 06:46:58 +0000 (22:46 -0800)]
drm/msm: Trigger fence completion from GPU
Interrupt commands causes the CP to trigger an interrupt as the command
is processed, regardless of the GPU being done processing previous
commands. This is seen by the interrupt being delivered before the
fence is written on 8974 and is likely the cause of the additional
CP_WAIT_FOR_IDLE workaround found for a306, which would cause the CP to
wait for the GPU to go idle before triggering the interrupt.
Instead we can set the (undocumented) BIT(31) of the CACHE_FLUSH_TS
which will cause a special CACHE_FLUSH_TS interrupt to be triggered from
the GPU as the write event is processed.
Add CACHE_FLUSH_TS to the IRQ masks of A3xx and A4xx and remove the
workaround for A306.
Suggested-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 14 Feb 2018 16:14:23 +0000 (11:14 -0500)]
drm/msm/dsi: fix direct caller of msm_gem_free_object()
This should be using drm_gem_object_put(). Also since this is done only
in driver unload path, we don't need to synchronize setting tx_gem_obj
to NULL, so juse use the _unlocked() variant.
Rob Clark [Mon, 12 Feb 2018 13:18:27 +0000 (08:18 -0500)]
drm/msm: rename mdp->disp
Since new display controller is called "dpu" instead of "mdp". Lets
make the name of the toplevel directory for the display controllers a
bit more generic.
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org>
drm/msm/dsi: Fix potential NULL pointer dereference in msm_dsi_modeset_init
_dev_ is being dereferenced before it is null checked, hence there
is a potential null pointer dereference.
Fix this by moving the pointer dereference after _dev_ has been
null checked.
Fixes: d4e7f38d70ef ("drm/msm/dsi: check msm_dsi and dsi pointers before use") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
_minor_ is being dereferenced before it is null checked, hence there
is a potential null pointer dereference. Fix this by moving the pointer
dereference after _minor_ has been null checked.
Fixes: 024ad8df763f ("drm/msm: add a5xx specific debugfs") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
Zhenyu Wang [Mon, 19 Mar 2018 09:09:05 +0000 (17:09 +0800)]
drm/i915/gvt: force to set all context control bits from guest
Our shadow context content is from guest but with masked control reg like
CTX_CONTEXT_CONTROL, we need to make sure all settings from guest would be set
when this context is on hw, this trys to force mask enable bits for all to
ensure every bits setting would be effective on hw.
One regression found related to once inhibit bit is set, gpu engine are working
on inhibit state until MI_LOAD_REG_IMM command or context image clear inhibit
bit with mask bit set to 1, and val bit set to 0. In gvt-g currently workload
has the highest priority, so gvt-g workload could trigger preempt context
easily, preempt context set inhibit bit, then gvt-g workload is scheduled in,
but gvt-g workload shadow context image usually doesn't set inhibit mask bit,
so gpu is still in inhibit state when gvt workload is running. This caused gpu
hang.
Zhi Wang [Wed, 7 Feb 2018 10:12:14 +0000 (18:12 +0800)]
drm/i915/gvt: Invalidate vGPU PPGTT mm objects during a vGPU reset.
As different OSes might handling GVT PPGTT creation/destroy notification
differently during a vGPU reset. A better approach is invalidating all
vGPU PPGTT mm objects during vGPU reset.
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
These callbacks allow the exporter to swap in and pin the backing
storage for buffers as well as invalidate the cache in preparation for
accessing the buffer from the CPU, and flush the cache and unpin the
backing storage when the CPU is done modifying the buffer.
Thierry Reding [Wed, 13 Dec 2017 11:22:48 +0000 (12:22 +0100)]
drm/tegra: gem: Map pages via the DMA API
When allocating pages, map them with the DMA API in order to invalidate
caches. This is the correct usage of the API and works just as well as
faking up the SG table and using the dma_sync_sg_for_device() function.
In preparation to enabling -Wvla, remove VLA. In this particular
case use macro ARRAY_SIZE so the length of array _bo_ can be
computed at preprocessing time.
The use of stack Variable Length Arrays needs to be avoided, as they
can be a vector for stack exhaustion, which can be both a runtime bug
or a security flaw. Also, in general, as code evolves it is easy to
lose track of how big a VLA can get. Thus, we can end up having runtime
failures that are hard to debug.
Also, fixed as part of the directive to remove all VLAs from
the kernel: https://lkml.org/lkml/2018/3/7/621
Harry Wentland [Wed, 8 Nov 2017 20:58:25 +0000 (15:58 -0500)]
amdgpu/dm: Default PRE_VEGA ASIC support to 'y'
Even though we default PRE_VEGA support to 'n' upstream in amd-staging
we want to keep it enabled by default.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 15 Mar 2018 10:31:00 +0000 (16:01 +0530)]
drm/amd/display: fix dereferencing possible ERR_PTR()
This patch fixes static checker warning caused by
"36cc549d5986: "drm/amd/display: disable CRTCs with
NULL FB on their primary plane (V2)"
Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Clark Zheng [Thu, 15 Mar 2018 06:02:06 +0000 (14:02 +0800)]
drm/amd/display: Refine disable VGA
bad case won't follow normal sense, it will not enable vga1 as usual, but vga2,3,4 is on.
Signed-off-by: Clark Zheng <clark.zheng@amd.com> Reviewed-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ville Syrjälä [Tue, 13 Mar 2018 15:07:58 +0000 (17:07 +0200)]
drm: Make drm_mode_vrefresh() a bit more accurate
Do the refresh rate calculation with a single division. This gives
us slightly more accurate results, especially for interlaced since
we don't just double the final truncated result.
We do lose one bit compared to the old way, so with an interlaced
mode the new code can only handle ~2GHz instead of the ~4GHz the
old code handeled.
Ville Syrjälä [Thu, 15 Mar 2018 15:22:41 +0000 (17:22 +0200)]
drm: Verify gamma/degamma LUT size
While we want to potentially support multiple different gamma/degamma
LUT sizes we can (and should) at least check that the blob length
is a multiple of the LUT entry size.
v2: s/expected_size_mod/expected_elem_size/ (Daniel)
Add kernel doc (Daniel)
v3: s/we/were/ typo in the docs
Ville Syrjälä [Fri, 23 Feb 2018 19:25:01 +0000 (21:25 +0200)]
Revert "drm: Use a flexible array member for blob property data"
Using a flexible array for the blob data was a mistake by me. It
forces all users of the blob data to cast blob->data to something
else. void* is clearly superior so let's go back to the original
scheme.
Tvrtko Ursulin [Wed, 14 Mar 2018 08:05:35 +0000 (08:05 +0000)]
drm/i915/pmu: Work around compiler warnings on some kernel configs
Arnd Bergman reports:
"""
The conditional spinlock confuses gcc into thinking the 'flags' value
might contain uninitialized data:
drivers/gpu/drm/i915/i915_pmu.c: In function '__i915_pmu_event_read':
arch/x86/include/asm/paravirt_types.h:573:3: error: 'flags' may be used uninitialized in this function [-Werror=maybe-uninitialized]
The code is correct, but it's easy to see how the compiler gets confused
here. This avoids the problem by pulling the lock outside of the function
into its only caller.
"""
On deeper look it seems this is caused by paravirt spinlocks
implementation when CONFIG_PARAVIRT_DEBUG is set, which by being
complicated, manages to convince gcc locked parameter can be changed
externally (impossible).
Work around it by removing the conditional locking parameters altogether.
(It was never the most elegant code anyway.)
Slight penalty we now pay is an additional irqsave spin lock/unlock cycle
on the event enable path. But since enable is not a fast path, that is
preferrable to the alternative solution which was doing MMIO under irqsave
spinlock.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Fixes: 1fe699e30113 ("drm/i915/pmu: Fix sleep under atomic in RC6 readout") Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Imre Deak <imre.deak@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: David Airlie <airlied@linux.ie> Cc: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180314080535.17490-1-tvrtko.ursulin@linux.intel.com
(cherry picked from commit ad055fb8e010e4ff37f66aeed1d380329bddce67) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Chris Wilson [Wed, 7 Mar 2018 13:42:26 +0000 (13:42 +0000)]
drm/i915: Only call tasklet_kill() on the first prepare_reset
tasklet_kill() will spin waiting for the current tasklet to be executed.
However, if tasklet_disable() has been called, then the tasklet is never
executed but permanently put back onto the runlist until
tasklet_enable() is called. Ergo, we cannot use tasklet_kill() inside a
disable/enable pair. This is the case when we call set-wedge from inside
i915_reset(), and another request was submitted to us concurrent to the
reset.
Chris Wilson [Wed, 7 Mar 2018 13:42:25 +0000 (13:42 +0000)]
drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection
Similar to the staging around handling of engine->submit_request, we
need to stop adding to the execlists->queue prior to calling
engine->cancel_requests. cancel_requests will move requests from the
queue onto the timeline, so if we add a request onto the queue after that
point, it will be lost.
Chris Zhong [Fri, 16 Feb 2018 12:09:56 +0000 (13:09 +0100)]
drm/rockchip: cdn-dp: remove the DP phy switch
There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence
only one PHY can connect to DP controller at one time, the other should
be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,
set this bit means enable PHY 1, clear this bit means enable PHY 0.
If the board has 2 Type-C ports, the DP driver get the phy id from
devm_of_phy_get_by_index, and then control this switch according to
this id. But some others board only has one Type-C port, it may be PHY 0
or PHY 1. The dts node id can not tell us the correct PHY id. Hence move
this switch to PHY driver, the PHY driver can distinguish between PHY 0
and PHY 1, and then write the correct register bit.
Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
[The phy-changes are in the phy-tree now and the cdn-dp wasn't
enabled at all so far, so this change can go through drm-misc
alone without causing issues when testing drm-misc] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20180216120956.19034-6-enric.balletbo@collabora.com
drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel
and amdgpu_bo_create_reserved.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Thierry Reding [Thu, 15 Mar 2018 15:44:04 +0000 (16:44 +0100)]
drm/tegra: plane: Support format modifiers
Pass the list of valid format modifiers to planes upon initialization
and implement the ->format_mod_supported() callback so that userspace
can query for the valid combinations of formats and modifiers.
Rex Zhu [Wed, 14 Mar 2018 12:05:12 +0000 (20:05 +0800)]
drm/amd/pp: Rename file name cz_* to smu8_*
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 14 Mar 2018 09:29:54 +0000 (17:29 +0800)]
drm/amd/pp: Replace function/struct name cz_* with smu8_*
hw ip smu8 was used on CZ/ST,
so use smu8 as the prefix of the function/struct name in powerplay.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 13 Mar 2018 08:50:44 +0000 (16:50 +0800)]
drm/amd/pp: Remove unneeded void * casts in cz_hwmgr.c/cz_smumgr.c
Removes unneeded void * casts for the following pointers:
hwmgr->backend
hwmgr->smu_backend
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 13 Mar 2018 07:44:42 +0000 (15:44 +0800)]
drm/amd/pp: Mv cz uvd/vce pg/dpm functions to cz_hwmgr.c
1. delete cz_clockpowergating.c/.h files
2. mark uvd/vce dpm/pg functions static
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 13 Mar 2018 07:35:17 +0000 (15:35 +0800)]
drm/amd/pp: Remove dead header file pp_asicblocks.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 13 Mar 2018 07:27:06 +0000 (15:27 +0800)]
drm/amd/pp: Delete dead code on cz_clockpowergating.c
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 12 Mar 2018 11:52:23 +0000 (19:52 +0800)]
drm/amdgpu: Remove wrapper layer of smu ip functions
1. delete amdgpu_powerplay.c used for wrapping smu ip functions
2. delete struct pp_instance,
3. make struct hwmgr as the smu hw handle.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 14 Mar 2018 07:38:48 +0000 (15:38 +0800)]
drm/amdgpu: Don't compared ip_block_type with ip_block_index
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 12 Mar 2018 11:50:38 +0000 (19:50 +0800)]
drm/amdgpu: Plus NULL function pointer check
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 9 Mar 2018 11:52:26 +0000 (19:52 +0800)]
drm/amd/pp: Move helper functions to smu_help.c
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>