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4 years agodrm/nouveau/fifo/gf1xx: convert to using nvkm_fault_data
Ben Skeggs [Thu, 13 Jun 2019 03:58:50 +0000 (13:58 +1000)]
drm/nouveau/fifo/gf1xx: convert to using nvkm_fault_data

Would like to be able to reuse gf100_fifo_intr_fault() for (some of) the
later chipsets too, as it's identical.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/bios/init: handle INIT_RESET_END devinit opcode
Rhys Kidd [Sun, 2 Jun 2019 14:13:15 +0000 (00:13 +1000)]
drm/nouveau/bios/init: handle INIT_RESET_END devinit opcode

Signal that the reset sequence has completed.

This opcode signals that the software reset sequence has completed.
Ordinarily, no actual operations are performed by the opcode.
However it allows for possible software work arounds by devinit
engines in software agents other than the VBIOS, such as the resman,
FCODE, and EFI driver.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcode
Rhys Kidd [Sun, 2 Jun 2019 14:13:14 +0000 (00:13 +1000)]
drm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcode

Signal that the reset sequence has begun.

This opcode signals that the software reset sequence has begun.
Ordinarily, no actual operations are performed by the opcode.
However it allows for possible software work arounds by devinit
engines in software agents other than the VBIOS, such as the resman,
FCODE, and EFI driver.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/bios: downgrade absence of tmds table to info from an error
Rhys Kidd [Sun, 2 Jun 2019 12:07:27 +0000 (22:07 +1000)]
drm/nouveau/bios: downgrade absence of tmds table to info from an error

Absence of a TMDS Info Table is common on Optimus setups where the NVIDIA
gpu is not connected directly to any outputs.

Reporting an error in this scenario is too harsh. Accordingly, change the
error message to an info message.

By default the error message also causes a boot flicker for these sytems.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau: Disable atomic support on a per-device basis
Ville Syrjälä [Thu, 13 Sep 2018 16:31:46 +0000 (19:31 +0300)]
drm/nouveau: Disable atomic support on a per-device basis

We now have per-device driver_features, so let's use that
to disable atomic only for pre-nv50.

Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: nouveau@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/kms/nv50-: add fp16 scanout support
Ilia Mirkin [Tue, 28 May 2019 02:58:37 +0000 (22:58 -0400)]
drm/nouveau/kms/nv50-: add fp16 scanout support

Older hardware seems to want 0..1024 values, while new hardware takes
0..1 values. We set the gain to 1024 for the earlier display classes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/kms/nv50-: disable input lut harder
Ben Skeggs [Wed, 29 May 2019 06:39:53 +0000 (16:39 +1000)]
drm/nouveau/kms/nv50-: disable input lut harder

Under some circumstances, it could be left enabled when it shouldn't be.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/kms/tu102-: disable input lut when input is already FP16
Ben Skeggs [Wed, 29 May 2019 05:44:57 +0000 (15:44 +1000)]
drm/nouveau/kms/tu102-: disable input lut when input is already FP16

On Turing, an input LUT is required to transform inputs in fixed-point
formats to FP16 for the internal display pipe.  We provide an identity
mapping whenever a window is enabled for this reason.

HW has error checks to ensure when the input is already FP16, that the
input LUT is also disabled.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/kms/gv100: allow windows to use PACKED8BPP formats
Ben Skeggs [Tue, 28 May 2019 06:33:59 +0000 (16:33 +1000)]
drm/nouveau/kms/gv100: allow windows to use PACKED8BPP formats

Required for upcoming FP16 scanout support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau: fix nvif/device.h is included more than once
Hariprasad Kelam [Sun, 26 May 2019 11:06:25 +0000 (16:36 +0530)]
drm/nouveau: fix nvif/device.h is included more than once

remove duplicate inclusion of nvif/device.h

Issue identified by includecheck

Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/dispnv04: subdev/bios.h is included more than once
Hariprasad Kelam [Sun, 26 May 2019 10:59:36 +0000 (16:29 +0530)]
drm/nouveau/dispnv04: subdev/bios.h is included more than once

remove duplicate inclusion of subdev/bios.h

Issue identified by includecheck

Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/mmu: use struct_size() helper
Gustavo A. R. Silva [Fri, 24 May 2019 17:15:36 +0000 (12:15 -0500)]
drm/nouveau/mmu: use struct_size() helper

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes, in particular in the
context in which this code is being used.

So, replace the following form:

sizeof(*kind) + sizeof(*kind->data) * mmu->kind_nr;

with:

struct_size(kind, data, mmu->kind_nr)

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau: drop use of drmp.h
Sam Ravnborg [Sun, 19 May 2019 14:00:44 +0000 (16:00 +0200)]
drm/nouveau: drop use of drmp.h

Drop use of the deprecated drmP.h file from drm/nouveau.

Build tested using allyesconfig and allmodconfig.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau: drop drmP.h from all header files
Sam Ravnborg [Sun, 19 May 2019 14:00:43 +0000 (16:00 +0200)]
drm/nouveau: drop drmP.h from all header files

Drop include of the deprecated drmP.h from all nouveau heder files.
This allows us to remove drmP.h from all .c files without any
side-effects in a follow-up commit.

Build tested using allyeyconfig and allmodconfig

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau: drop drmP.h from nouveau_drv.h
Sam Ravnborg [Sun, 19 May 2019 14:00:42 +0000 (16:00 +0200)]
drm/nouveau: drop drmP.h from nouveau_drv.h

Drop the deprecated drmP.h header from nouveau_drv.h.
Fix fallout in other parts of the driver.

Build tested using allmodconfig and allyesconfig.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau: drop use of DRM_UDELAY
Sam Ravnborg [Sun, 19 May 2019 14:00:41 +0000 (16:00 +0200)]
drm/nouveau: drop use of DRM_UDELAY

The DRM_UDELAY is a simple wrapper for udealy() and to be consistent
call udelay() direct like in may other places.
This avoids the need to pull in drm_os_linux.h when we later
drop drmP.h uses in nouveau.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"
Colin Ian King [Tue, 14 May 2019 20:57:01 +0000 (21:57 +0100)]
drm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"

There is a spelling mistake in a warning message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/nouveau/secboot: Make acr_r352_ls_gpccs_func static
YueHaibing [Wed, 17 Jul 2019 06:56:26 +0000 (14:56 +0800)]
drm/nouveau/secboot: Make acr_r352_ls_gpccs_func static

Fix sparse warning:

drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c:1092:1:
 warning: symbol 'acr_r352_ls_gpccs_func' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
4 years agodrm/panfrost: Fix sleeping while atomic in panfrost_gem_open
Rob Herring [Mon, 19 Aug 2019 16:12:04 +0000 (11:12 -0500)]
drm/panfrost: Fix sleeping while atomic in panfrost_gem_open

We can't hold the mm_lock spinlock as panfrost_mmu_map() can sleep:

BUG: sleeping function called from invalid context at kernel/locking/mutex.c:909
in_atomic(): 1, irqs_disabled(): 0, pid: 974, name: glmark2-es2-drm
1 lock held by glmark2-es2-drm/974:
CPU: 5 PID: 974 Comm: glmark2-es2-drm Tainted: G        W    L    5.3.0-rc1+ #94
Hardware name: 96boards Rock960 (DT)
Call trace:
 dump_backtrace+0x0/0x130
 show_stack+0x14/0x20
 dump_stack+0xc4/0x10c
 ___might_sleep+0x158/0x228
 __might_sleep+0x50/0x88
 __mutex_lock+0x58/0x800
 mutex_lock_interruptible_nested+0x1c/0x28
 drm_gem_shmem_get_pages+0x24/0xa0
 drm_gem_shmem_get_pages_sgt+0x48/0xd0
 panfrost_mmu_map+0x38/0xf8 [panfrost]
 panfrost_gem_open+0xc0/0xd8 [panfrost]
 drm_gem_handle_create_tail+0xe8/0x198
 drm_gem_handle_create+0x3c/0x50
 panfrost_gem_create_with_handle+0x70/0xa0 [panfrost]
 panfrost_ioctl_create_bo+0x48/0x80 [panfrost]
 drm_ioctl_kernel+0xb8/0x110
 drm_ioctl+0x244/0x3f0
 do_vfs_ioctl+0xbc/0x910
 ksys_ioctl+0x78/0xa8
 __arm64_sys_ioctl+0x1c/0x28
 el0_svc_common.constprop.0+0x90/0x168
 el0_svc_handler+0x28/0x78
 el0_svc+0x8/0xc

Fixes: a5efb4c9a562 ("drm/panfrost: Restructure the GEM object creation")
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190819161204.3106-5-robh@kernel.org
4 years agodrm/amd/display: fix calc_pll_max_vco_construct
Dmytro Laktyushkin [Thu, 15 Aug 2019 16:35:39 +0000 (12:35 -0400)]
drm/amd/display: fix calc_pll_max_vco_construct

This was broken by a previous change switching to cached fw_info.
Fixed by inverting a valid bool check.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111432
Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create")
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable VCN DPG for Renoir
Thong Thai [Thu, 15 Aug 2019 18:00:30 +0000 (14:00 -0400)]
drm/amdgpu: enable VCN DPG for Renoir

This will enable indirect SRAM loading for VCN DPG mode initialization.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amdgpu: use direct loading on renoir vcn for the moment"
Thong Thai [Thu, 22 Aug 2019 22:42:53 +0000 (17:42 -0500)]
Revert "drm/amdgpu: use direct loading on renoir vcn for the moment"

This reverts commit 444a0fea5107e9ad7e3cbbafed78678489e31713.

We are ready to enable it now.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: update gc/sdma goldensetting for rn
Aaron Liu [Wed, 7 Aug 2019 01:57:08 +0000 (09:57 +0800)]
drm/amdgpu: update gc/sdma goldensetting for rn

This patch updates gc/sdma goldensetting for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: Disable renoir smu feature retrieve for the moment
Prike Liang [Fri, 9 Aug 2019 06:17:40 +0000 (14:17 +0800)]
drm/amd/powerplay: Disable renoir smu feature retrieve for the moment

To avoid the dpm frequence range get failed when DPM enabled and it
will be enabled later once handle well the feature bit map struct.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: enable renoir dpm feature
Prike Liang [Thu, 25 Jul 2019 05:56:51 +0000 (13:56 +0800)]
drm/amd/powerplay: enable renoir dpm feature

enable the dpm feature for the renoir.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable SDMA power gating for rn
Prike Liang [Fri, 2 Aug 2019 07:42:41 +0000 (15:42 +0800)]
drm/amdgpu: enable SDMA power gating for rn

Enable SDMA PG flag during device ip early init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sdma4: set sdma clock gating for rn
Prike Liang [Mon, 12 Aug 2019 20:25:18 +0000 (15:25 -0500)]
drm/amdgpu/sdma4: set sdma clock gating for rn

Add support for SDMA clockgating on RN.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/mmhub1: set mmhub clock gating for rn
Prike Liang [Mon, 29 Jul 2019 07:13:42 +0000 (15:13 +0800)]
drm/amdgpu/mmhub1: set mmhub clock gating for rn

setup mmhub clockgating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable DF clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:32:57 +0000 (15:32 +0800)]
drm/amdgpu: enable DF clock gating for rn

Enable DF clock gating during DF IP early init.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable athub clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:29:26 +0000 (15:29 +0800)]
drm/amdgpu: enable athub clock gating for rn

Enable athub MG and LS clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable IH clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:27:11 +0000 (15:27 +0800)]
drm/amdgpu: enable IH clock gating for rn

Enable IH clock gating during IH block initialized.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable vcn clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:24:45 +0000 (15:24 +0800)]
drm/amdgpu: enable vcn clock gating for rn

Enable VCN middle grain clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable rom clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:21:46 +0000 (15:21 +0800)]
drm/amdgpu: enable rom clock gating for rn

Enable rom light sleep clock gating.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable HDP clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:18:24 +0000 (15:18 +0800)]
drm/amdgpu: enable HDP clock gating for rn

Enable HDP light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable BIF clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:14:54 +0000 (15:14 +0800)]
drm/amdgpu: enable BIF clock gating for rn

Enable BIF light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable sdma clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:10:45 +0000 (15:10 +0800)]
drm/amdgpu: enable sdma clock gating for rn

Enable sdma middle grain and light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable mmhub clock gating for rn
Prike Liang [Fri, 2 Aug 2019 07:04:27 +0000 (15:04 +0800)]
drm/amdgpu: enable mmhub clock gating for rn

Enable mmhub midle grain and light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: enable gfx clock gating for rn
Prike Liang [Thu, 1 Aug 2019 08:21:07 +0000 (16:21 +0800)]
drm/amdgpu: enable gfx clock gating for rn

Enable gfx cg/mg/cp etc clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: add DPMCLOCKS table implementation
Aaron Liu [Tue, 30 Jul 2019 03:28:27 +0000 (11:28 +0800)]
drm/amd/powerplay: add DPMCLOCKS table implementation

This patch adds add DPMCLOCKS table implementation
Rename smu_populate_smc_pptable to smu_populate_smc_tables

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: init smu tables for rn
Aaron Liu [Tue, 30 Jul 2019 03:04:58 +0000 (11:04 +0800)]
drm/amd/powerplay: init smu tables for rn

Initialize smu tables for renoir:
WATERMARKS/DPMCLOCKS/SMU_METRICS

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: add smu tables for rn
Aaron Liu [Tue, 30 Jul 2019 02:50:44 +0000 (10:50 +0800)]
drm/amd/powerplay: add smu tables for rn

add and map smu tables for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: using valid mapping check for rn
Aaron Liu [Wed, 21 Aug 2019 21:45:52 +0000 (16:45 -0500)]
drm/amd/powerplay: using valid mapping check for rn

Check whether the message mapping is valid

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: fix checking gfxoff status for rn
Aaron Liu [Fri, 26 Jul 2019 02:51:32 +0000 (10:51 +0800)]
drm/amd/powerplay: fix checking gfxoff status for rn

For renoir, it should use mmSMUIO_GFX_MISC_CNTL to check
gfxoff status. For the first time to enter gfxoff status,
it maybe takes about one second more. So just set the max
timeout to 5s.

GFXOFF_STATUS(bits 2:1)'s description is below:
0=GFXOFF(default).
1=Transition out of GFX State.
2=Not in GFXOFF.
3=Transition into GFXOFF.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add and enable gfxoff feature
Aaron Liu [Tue, 16 Jul 2019 09:33:47 +0000 (17:33 +0800)]
drm/amdgpu: add and enable gfxoff feature

This patch updates gfxoff feature.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add set_gfx_cgpg implement (v2)
Aaron Liu [Tue, 16 Jul 2019 09:21:17 +0000 (17:21 +0800)]
drm/amdgpu: add set_gfx_cgpg implement (v2)

add set_gfx_cgpg implement

v2: check if using sw_smu (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: udpate smu_v12_0_check_fw_version (v2)
Aaron Liu [Tue, 23 Jul 2019 02:39:38 +0000 (10:39 +0800)]
drm/amd/powerplay: udpate smu_v12_0_check_fw_version (v2)

This interface support SMU_MSG_GetDriverIfVersion
and SMU_MSG_GetSmuVersion checking.

v2: squash in driver_if changes (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: powerup sdma/vcn for all apu series
Huang Rui [Thu, 8 Aug 2019 20:23:17 +0000 (15:23 -0500)]
drm/amd/powerplay: powerup sdma/vcn for all apu series

All apu series need powerup sdma and vcn via smu messages.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: add Renoir VCN power management
Leo Liu [Thu, 8 Aug 2019 20:21:44 +0000 (15:21 -0500)]
drm/amdgpu/powerplay: add Renoir VCN power management

Thus VCN can be powered up for normal operations

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: skip dpm init for renoir
Huang Rui [Wed, 24 Jul 2019 19:05:11 +0000 (14:05 -0500)]
drm/amdgpu: skip dpm init for renoir

Renoir DPM is not functional so far, we skip it for the comment.
Will revert this patch once SMU 12 is functional.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: add power up/down SDMA interfaces for renoir
Aaron Liu [Fri, 9 Aug 2019 15:34:40 +0000 (10:34 -0500)]
drm/amdgpu/powerplay: add power up/down SDMA interfaces for renoir

1.Implement PowerUpSDMA/PowerDownSDMA interfaces in the swSMU for renoir
2.adjust smu ip block ahead of gfx&sdma ip block

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: add smu ip block for renoir (v2)
Aaron Liu [Wed, 24 Jul 2019 19:00:01 +0000 (14:00 -0500)]
drm/amdgpu/powerplay: add smu ip block for renoir (v2)

add swSMU [smu_v12_0] for renoir

v2: whitespace fixes (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: add smu_v12_0.c & smu_v12_0.h for renoir
Aaron Liu [Wed, 22 May 2019 11:16:27 +0000 (19:16 +0800)]
drm/amdgpu/powerplay: add smu_v12_0.c & smu_v12_0.h for renoir

add smu_v12_0.c & smu_v12_0.h for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: add initial renoir_ppt.c for renoir (v3)
Aaron Liu [Thu, 8 Aug 2019 20:18:30 +0000 (15:18 -0500)]
drm/amdgpu/powerplay: add initial renoir_ppt.c for renoir (v3)

Add renoir_ppt and map ppsmc to amdgpu_smu.h

v2: squash in ppsmc updates (Alex)
v3: squash in driver_if updates (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: add smu12_driver_if.h (v3)
Aaron Liu [Mon, 15 Jul 2019 05:53:32 +0000 (13:53 +0800)]
drm/amd/powerplay: add smu12_driver_if.h (v3)

This patch adds smu12_driver_if.h

v2: squash in updates (Alex)
v3: more updates (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: Add smu_v12_0_ppsmc.h (v2)
Alex Deucher [Thu, 25 Jul 2019 20:42:52 +0000 (15:42 -0500)]
drm/amdgpu/powerplay: Add smu_v12_0_ppsmc.h (v2)

This is the SMU v12 driver message interface.

v2: squash in updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix a potential null pointer dereference
Colin Ian King [Fri, 16 Aug 2019 22:10:11 +0000 (23:10 +0100)]
drm/amd/display: fix a potential null pointer dereference

Currently the pointer init_data is dereferenced on the assignment
of fw_info before init_data is sanity checked to see if it is null.
Fix te potential null pointer dereference on init_data by only
performing dereference after it is null checked.

Addresses-Coverity: ("Dereference before null check")
Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay: remove redundant assignment to variable baco_state
Colin Ian King [Thu, 22 Aug 2019 13:09:48 +0000 (14:09 +0100)]
drm/amdgpu/powerplay: remove redundant assignment to variable baco_state

Variable baco_state is initialized to a value that is never read and it is
re-assigned later. The initialization is redundant and can be removed.

Addresses-Coverity: ("Unused Value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Make deallocate_hiq_sdma_mqd static
YueHaibing [Sat, 25 May 2019 12:51:09 +0000 (20:51 +0800)]
drm/amdkfd: Make deallocate_hiq_sdma_mqd static

Fix sparse warning:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:1846:6:
 warning: symbol 'deallocate_hiq_sdma_mqd' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sdma5: fix number of sdma5 trap irq types for navi1x
Xiaojie Yuan [Wed, 21 Aug 2019 13:00:29 +0000 (21:00 +0800)]
drm/amdgpu/sdma5: fix number of sdma5 trap irq types for navi1x

v2: set num_types based on num_instances

navi1x has 2 sdma engines but commit
"e7b58d03b678 drm/amdgpu: reorganize sdma v4 code to support more instances"
changes the max number of sdma irq types (AMDGPU_SDMA_IRQ_LAST) from 2 to 8
which causes amdgpu_irq_gpu_reset_resume_helper() to recover irq of sdma
engines with following logic:

(enable irq for sdma0) * 1 time
(enable irq for sdma1) * 1 time
(disable irq for sdma1) * 6 times

as a result, after gpu reset, interrupt for sdma1 is lost.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Enable SST DSC in DM
David Francis [Wed, 19 Jun 2019 18:30:59 +0000 (14:30 -0400)]
drm/amd/display: Enable SST DSC in DM

In create_stream_for_sink, check for SST DP connectors

Parse DSC caps to DC format, then, if DSC is supported,
compute the config

DSC hardware will be programmed by dc_commit_state

Tested-by: Mikita Lipski <Mikita.Lipski@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amd/display: Fix underscan not using proper scaling"
David Francis [Thu, 23 May 2019 18:25:35 +0000 (14:25 -0400)]
Revert "drm/amd/display: Fix underscan not using proper scaling"

This reverts commit 80e80ec817f161560b4159608fb41bd289abede3.

This commit fixed an issue with underscan commits not updating all
needed timing values, but through various refactors it is no longer
necessary. It causes corruption on odm combine by
overwriting the halved h_active in the stream timing

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amd/display: add global master update lock for DCN2"
David Francis [Thu, 23 May 2019 18:06:08 +0000 (14:06 -0400)]
Revert "drm/amd/display: add global master update lock for DCN2"

This reverts commit 6c5be4ac630805d3a3b20157a0c6421ef815fe78.

This commit was accidentally promoted twice

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amd/display: navi10 bring up skip dsc encoder config"
David Francis [Thu, 28 Mar 2019 13:58:11 +0000 (09:58 -0400)]
Revert "drm/amd/display: navi10 bring up skip dsc encoder config"

This reverts commit ec8763486dd3d2fb585c2e6747520406e7dcef98.

Re-enable enc2_dp_set_dsc_config. This function caused warnings
due to missing register definitions. With the registers added,
this now works

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amd/display: skip dsc config for navi10 bring up"
David Francis [Thu, 28 Mar 2019 17:52:00 +0000 (13:52 -0400)]
Revert "drm/amd/display: skip dsc config for navi10 bring up"

This reverts commit 9e14d4f17e23ce46d346a6a22a295b4a65b9d918.

optc dsc config was causing warnings due to missing register
definitions. With the registers restored, the function can
be re-enabled

The reverted commit also disabled sanity checks and dsc
power gating. The sanity check warnings are not associated
with dsc, and power gating on dsc still has an issue on
non-dsc monitors where the dsc hardware block is never init
and so cannot respond to power gating requests. Therefore,
those are left as is

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix dma_fence_wait without reference
Christian König [Fri, 16 Aug 2019 12:56:35 +0000 (14:56 +0200)]
drm/amdgpu: fix dma_fence_wait without reference

We need to grab a reference to the fence we wait for.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/powerplay: Fix Vega20 Average Power value v4
Kent Russell [Thu, 22 Aug 2019 12:17:40 +0000 (08:17 -0400)]
drm/powerplay: Fix Vega20 Average Power value v4

The SMU changed reading from CurrSocketPower to AverageSocketPower, so
reflect this accordingly. This fixes the issue where Average Power
Consumption was being reported as 0 from SMU 40.46-onward

v2: Fixed headline prefix
v3: Add check for SMU version for proper compatibility
v4: Style fix

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoamd/amdgpu: add Arcturus vf DID support
Frank.Min [Thu, 22 Aug 2019 22:16:36 +0000 (17:16 -0500)]
amd/amdgpu: add Arcturus vf DID support

Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: unity mc base address for arcturus
Frank.Min [Wed, 21 Aug 2019 03:05:04 +0000 (11:05 +0800)]
drm/amdgpu: unity mc base address for arcturus

arcturus for sriov would use the unified mc base address

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: disable agp for sriov
Frank.Min [Wed, 21 Aug 2019 09:20:34 +0000 (17:20 +0800)]
drm/amdgpu: disable agp for sriov

Since agp is not used for sriov, just disable it

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm: meson: use match data to detect vpu compatibility
Julien Masson [Thu, 22 Aug 2019 14:43:41 +0000 (16:43 +0200)]
drm: meson: use match data to detect vpu compatibility

This patch introduce new enum which contains all VPU family (GXBB,
GXL, GXM and G12A).
This enum is used to detect the VPU compatible with the device.

We only need to set .data to the corresponding enum in the device
table, no need to check .compatible string anymore.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87imqpz21w.fsf@masson.i-did-not-set--mail-host-address--so-tickle-me
4 years agodrm/amdgpu/powerplay: silence a warning in smu_v11_0_setup_pptable
Alex Deucher [Thu, 22 Aug 2019 03:23:18 +0000 (22:23 -0500)]
drm/amdgpu/powerplay: silence a warning in smu_v11_0_setup_pptable

I think gcc is confused as I don't see how size could be used
uninitialized, but go ahead and silence the warning.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/i915: Update DRIVER_DATE to 20190822
Rodrigo Vivi [Thu, 22 Aug 2019 12:46:28 +0000 (05:46 -0700)]
drm/i915: Update DRIVER_DATE to 20190822

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
4 years agodrm/i915: Kill the undead i915_gem_batch_pool.c
Chris Wilson [Thu, 22 Aug 2019 06:59:17 +0000 (07:59 +0100)]
drm/i915: Kill the undead i915_gem_batch_pool.c

You have to cut it off at the neck, otherwise it just reappears in the
next merge, like it did in commit 3f866026f0ce ("Merge drm/drm-next
into drm-intel-next-queued")

References: 3f866026f0ce ("Merge drm/drm-next into drm-intel-next-queued")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190822065917.18988-1-chris@chris-wilson.co.uk
4 years agodrm/i915: Replace i915_vma_put_fence()
Chris Wilson [Thu, 22 Aug 2019 06:15:57 +0000 (07:15 +0100)]
drm/i915: Replace i915_vma_put_fence()

Avoid calling i915_vma_put_fence() by using our alternate paths that
bind a secondary vma avoiding the original fenced vma. For the few
instances where we need to release the fence (i.e. on binding when the
GGTT range becomes invalid), replace the put_fence with a revoke_fence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190822061557.18402-1-chris@chris-wilson.co.uk
4 years agodrm/i915: Pull obj->userfault tracking under the ggtt->mutex
Chris Wilson [Thu, 22 Aug 2019 06:09:13 +0000 (07:09 +0100)]
drm/i915: Pull obj->userfault tracking under the ggtt->mutex

Since we want to revoke the ggtt vma from only under the ggtt->mutex, we
need to move protection of the userfault tracking from the struct_mutex
to the ggtt->mutex.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190822060914.2671-2-chris@chris-wilson.co.uk
4 years agodrm/i915: Track ggtt fence reservations under its own mutex
Chris Wilson [Thu, 22 Aug 2019 06:09:12 +0000 (07:09 +0100)]
drm/i915: Track ggtt fence reservations under its own mutex

We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190822060914.2671-1-chris@chris-wilson.co.uk
4 years agodrm: fix module name in edid_firmware log message
Jani Nikula [Wed, 21 Aug 2019 09:43:12 +0000 (12:43 +0300)]
drm: fix module name in edid_firmware log message

The module is drm_kms_helper, not drm_kms_firmware.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204549
Reported-by: Göran Uddeborg <goeran@uddeborg.se>
Fixes: ac6c35a4d8c7 ("drm: add backwards compatibility support for drm_kms_helper.edid_firmware")
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190821094312.5514-1-jani.nikula@intel.com
4 years agodrm/i915: Generalise the clflush dma-worker
Chris Wilson [Wed, 21 Aug 2019 19:16:06 +0000 (20:16 +0100)]
drm/i915: Generalise the clflush dma-worker

Extract the dma-fence worker used by clflush for wider use, as we
anticipate using workers coupled to dma-fences more frequently.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190821191606.17001-1-chris@chris-wilson.co.uk
4 years agoMerge drm/drm-next into drm-intel-next-queued
Rodrigo Vivi [Thu, 22 Aug 2019 05:47:35 +0000 (22:47 -0700)]
Merge drm/drm-next into drm-intel-next-queued

We need the rename of reservation_object to dma_resv.

The solution on this merge came from linux-next:
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Wed, 14 Aug 2019 12:48:39 +1000
Subject: [PATCH] drm: fix up fallout from "dma-buf: rename reservation_object to dma_resv"

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
 drivers/gpu/drm/i915/gt/intel_engine_pool.c | 8 ++++----
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pool.c b/drivers/gpu/drm/i915/gt/intel_engine_pool.c
index 03d90b49584a..4cd54c569911 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pool.c
@@ -43,12 +43,12 @@ static int pool_active(struct i915_active *ref)
 {
        struct intel_engine_pool_node *node =
                container_of(ref, typeof(*node), active);
-       struct reservation_object *resv = node->obj->base.resv;
+       struct dma_resv *resv = node->obj->base.resv;
        int err;

-       if (reservation_object_trylock(resv)) {
-               reservation_object_add_excl_fence(resv, NULL);
-               reservation_object_unlock(resv);
+       if (dma_resv_trylock(resv)) {
+               dma_resv_add_excl_fence(resv, NULL);
+               dma_resv_unlock(resv);
        }

        err = i915_gem_object_pin_pages(node->obj);

which is a simplified version from a previous one which had:
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
4 years agoMerge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next
Dave Airlie [Thu, 22 Aug 2019 03:21:16 +0000 (13:21 +1000)]
Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next

Most importantly per-process address spaces on GPUs that are capable of
providing proper isolation has finished baking. This is the base for
our softpin implementation, which allows us to support the texture
descriptor buffers used by GC7000 series GPUs without a major UAPI
extension/rework.

Shortlog of notable changes:
- code cleanup from Fabio
- fix performance counters on GC880 and GC2000 GPUs from Christian
- drmP.h header removal from Sam
- per process address space support on MMUv2 GPUs from me
- softpin support from me

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Lucas Stach <l.stach@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1565946875.2641.73.camel@pengutronix.de
4 years agodrm/amdkfd: remove set but not used variable 'pdd'
YueHaibing [Fri, 26 Jul 2019 14:00:54 +0000 (22:00 +0800)]
drm/amdkfd: remove set but not used variable 'pdd'

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c: In function restore_process_worker:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c:949:29: warning:
 variable pdd set but not used [-Wunused-but-set-variable]

It is not used since
commit 5b87245faf57 ("drm/amdkfd: Simplify kfd2kgd interface")

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: remove duplicated include from dc_link.c
YueHaibing [Fri, 26 Jul 2019 07:51:31 +0000 (15:51 +0800)]
drm/amd/display: remove duplicated include from dc_link.c

Remove duplicated include.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove duplicated include from gfx_v9_0.c
YueHaibing [Wed, 10 Jul 2019 01:57:20 +0000 (01:57 +0000)]
drm/amdgpu: remove duplicated include from gfx_v9_0.c

Remove duplicated include.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove set but not used variable 'psp_enabled'
YueHaibing [Thu, 27 Jun 2019 07:53:50 +0000 (07:53 +0000)]
drm/amdgpu: remove set but not used variable 'psp_enabled'

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/amd/amdgpu/nv.c: In function 'nv_common_early_init':
drivers/gpu/drm/amd/amdgpu/nv.c:471:7: warning:
 variable 'psp_enabled' set but not used [-Wunused-but-set-variable]

It's not used since inroduction in
commit c6b6a42175f5 ("drm/amdgpu: add navi10 common ip block (v3)")

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix 32-bit divide error in wait_for_alt_mode
Nathan Chancellor [Tue, 20 Aug 2019 23:57:13 +0000 (16:57 -0700)]
drm/amd/display: Fix 32-bit divide error in wait_for_alt_mode

When building arm32 allyesconfig:

ld.lld: error: undefined symbol: __aeabi_uldivmod
>>> referenced by dc_link.c
>>> gpu/drm/amd/display/dc/core/dc_link.o:(wait_for_alt_mode) in archive drivers/built-in.a
>>> referenced by dc_link.c
>>> gpu/drm/amd/display/dc/core/dc_link.o:(wait_for_alt_mode) in archive drivers/built-in.a

time_taken_in_ns is of type unsigned long long so we need to use div_u64
to avoid this error.

Fixes: b5b1f4554904 ("drm/amd/display: Enable type C hotplug")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: prevent memory leaks in AMDGPU_CS ioctl
Nicolai Hähnle [Tue, 20 Aug 2019 13:39:53 +0000 (15:39 +0200)]
drm/amdgpu: prevent memory leaks in AMDGPU_CS ioctl

Error out if the AMDGPU_CS ioctl is called with multiple SYNCOBJ_OUT and/or
TIMELINE_SIGNAL chunks, since otherwise the last chunk wins while the
allocated array as well as the reference counts of sync objects are leaked.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Lock the CRTC when setting CRC source
Nicholas Kazlauskas [Tue, 20 Aug 2019 17:15:25 +0000 (13:15 -0400)]
drm/amd/display: Lock the CRTC when setting CRC source

[Why]
We need to ensure that we're holding the lock on the CRTC when setting
the CRC source since we're modifying the CRTC state directly.

We also need to wait for any outstanding non-blocking commits to finish
so they aren't reading state that's potentially being modified -
non-blocking commits don't hold the CRTC lock while doing commit tail
work.

[How]
Lock the CRTC using its mutex. While holding the lock check if there's
any commit active on the CRTC - if there is, it's non-blocking and
we should wait until it's finished by waiting for hw_done to be
signaled since that's the last point where we touch CRTC state.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Split out DC programming for CRC capture
Nicholas Kazlauskas [Tue, 20 Aug 2019 14:16:14 +0000 (10:16 -0400)]
drm/amd/display: Split out DC programming for CRC capture

[Why]
Calling amdgpu_dm_crtc_set_crc_source in amdgpu_dm directly has the
consequence of adding additional vblank references or starting DPRX
CRC capture more than once without calling stop first.

Vblank references for CRC capture should be managed entirely by opening
and closing the CRC file from userspace.

Stream state also shouldn't be required on the CRC so we can close the
file after the CRTC has been disabled.

[How]
Do DC programming required for configuring CRC capture separately from
setting the source. Whenever we re-enable or reset a CRC this
programming should be reapplied.

CRC vblank reference handling in amdgpu_dm can be entirely dropped after
this.

Stream state also no longer needs to be required since we can just defer
the programming to when the stream is actually enabled.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Use connector list for finding DPRX CRC aux
Nicholas Kazlauskas [Tue, 20 Aug 2019 14:10:08 +0000 (10:10 -0400)]
drm/amd/display: Use connector list for finding DPRX CRC aux

[Why]
This change is a refactor in preparation for adding locking and removing
the requirement for a stream state on the CRTC for enabling CRC capture
to fix igt@kms_plane_multiple@* warnings.

[How]
We can get the aux by finding the matching connector for the CRTC
with the assumption that we're not doing cloning.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Check return code for CRC drm_crtc_vblank_get
Nicholas Kazlauskas [Tue, 20 Aug 2019 16:58:37 +0000 (12:58 -0400)]
drm/amd/display: Check return code for CRC drm_crtc_vblank_get

[Why]
The call to drm_crtc_vblank_get can fail if vblank is disabled and
we try to increment the reference.

Since drm_crtc_vblank_get internally drops the reference when it fails
it means the subsequent drm_crtc_vblank_put(...) when closing the file
drops a zero reference.

This was found via igt@kms_plane@pixel-format-pipe-A-planes.

[How]
Check the return code and return it on failure.

We wouldn't have been able to enable CRC reading anyway since vblank
wasn't enabled.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/amdgpu: disable MMHUB PG for navi10
Kenneth Feng [Tue, 20 Aug 2019 07:11:37 +0000 (15:11 +0800)]
drm/amd/amdgpu: disable MMHUB PG for navi10

Disable MMHUB PG for navi10 according to the production requirement.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: correct typo
Evan Quan [Tue, 20 Aug 2019 04:22:16 +0000 (12:22 +0800)]
drm/amd/powerplay: correct typo

"COMPUTE" was wrongly spelled as "CUSTOM".

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: correct SW smu11 thermal range settings
Evan Quan [Fri, 16 Aug 2019 09:11:46 +0000 (17:11 +0800)]
drm/amd/powerplay: correct SW smu11 thermal range settings

Problems with current settings:
1. The min value was overrided to 0 on Vega20 & Navi10. While
   the expected should be -273.15 C.
2. The thermal min/max threshold was output in wrong unit on
   Navi10 & Arcturus. As TEMP_RANGE_MIN/MAX is already in
   millicelsius. And "*1000" in smu_v11_0_start_thermal_control
   makes the output wrongly.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: set Arcturus default fclk as bootup value on dpm disabled
Evan Quan [Fri, 16 Aug 2019 05:52:26 +0000 (13:52 +0800)]
drm/amd/powerplay: set Arcturus default fclk as bootup value on dpm disabled

On fclk dpm disabled, the default dpm table will be setup with only one
level and clock frequency as bootup value.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: get bootup fclk value
Evan Quan [Fri, 16 Aug 2019 05:47:01 +0000 (13:47 +0800)]
drm/amd/powerplay: get bootup fclk value

This is available with firmwareinfo table v3.2 or later.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: expose supported clock domains only through sysfs
Evan Quan [Fri, 16 Aug 2019 03:34:12 +0000 (11:34 +0800)]
drm/amd/powerplay: expose supported clock domains only through sysfs

Do not expose those unsupported clock domains through sysfs on
Arcturus.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: update Arcturus smc fw and driver interface header
Evan Quan [Fri, 16 Aug 2019 02:55:21 +0000 (10:55 +0800)]
drm/amd/powerplay: update Arcturus smc fw and driver interface header

Update smc fw and driver interface header.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h
Kevin Wang [Tue, 20 Aug 2019 05:28:51 +0000 (13:28 +0800)]
drm/amd/powerplay: remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h

remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h

"
 #define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \
         ((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0)
 #define smu_get_max_sustainable_clocks_by_dc(smu, max_clocks) \
         ((smu)->funcs->get_max_sustainable_clocks_by_dc ? (smu)->funcs->get_max_sustainable_clocks_by_dc((smu), (max_clocks)) : 0)
 #define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \
         ((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0)
"

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: fix variable type errors in smu_v11_0_setup_pptable
Kevin Wang [Mon, 19 Aug 2019 15:38:02 +0000 (23:38 +0800)]
drm/amd/powerplay: fix variable type errors in smu_v11_0_setup_pptable

fix size type errors, from uint32_t to uint16_t.
it will cause only initializes the highest 16 bits in
smu_get_atom_data_table function.

bug report:
This fixes the following static checker warning.
        drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:390 smu_v11_0_setup_pptable()
        warn: passing casted pointer '&size' to 'smu_get_atom_data_table()' 32 vs 16.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: add smu_smc_read_sensor support for arcturus
Kevin Wang [Fri, 16 Aug 2019 07:17:42 +0000 (15:17 +0800)]
drm/amd/powerplay: add smu_smc_read_sensor support for arcturus

the bellow patch refine the sensor read sequence,
but missed to add arcuturs support. (arcuturs_ppt.c)
it will cause some sensor is not supported in arcturus.

drm/amd/powerplay: change smu_read_sensor sequence in smu

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>