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6 years agodrm/amdgpu: change gfx9 ib test to use WB
Monk Liu [Tue, 23 Jan 2018 10:29:22 +0000 (18:29 +0800)]
drm/amdgpu: change gfx9 ib test to use WB

two reasons to switch SCRATCH reg method to WB method:

1)Because when doing IB test we don't want to involve KIQ health
status affect, and since SCRATCH register access is go through
KIQ that way GFX IB test would failed due to KIQ fail.

2)acccessing SCRATCH register cost much more time than WB method
because SCRATCH register access runs through KIQ which at least could
begin after GPU world switch back to current Guest VF

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: cond_exec only for schedule with a job
Monk Liu [Fri, 19 Jan 2018 11:06:31 +0000 (19:06 +0800)]
drm/amdgpu: cond_exec only for schedule with a job

issue:
under SR-IOV sometimes the iB test will fail on
gfx ring

fix:
with cond_exec inserted in RB the gfx engine would
skip part packets if RLCV issue PREEMPT on gfx engine
if gfx engine is prior to COND_EXEC packet, this is
okay for regular command from UMD, but for the ib test
since the whole dma format doesn't support PREEMPT
so must remove the COND_EXEC from it.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: only flush hotplug work without DC
Monk Liu [Fri, 19 Jan 2018 11:02:16 +0000 (19:02 +0800)]
drm/amdgpu: only flush hotplug work without DC

since hotplug_work is initialized under the case of
no dc support

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: skip ECC for SRIOV in gmc late_init
Monk Liu [Thu, 18 Jan 2018 08:58:04 +0000 (16:58 +0800)]
drm/amdgpu: skip ECC for SRIOV in gmc late_init

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix&cleanups for wb_clear
Monk Liu [Fri, 29 Dec 2017 09:06:41 +0000 (17:06 +0800)]
drm/amdgpu: fix&cleanups for wb_clear

fix:
should do right shift on wb before clearing

cleanups:
1,should memset all wb buffer
2,set max wb number to 128 (total 4KB) is big enough

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay/smu7: use proper dep table for mclk
Alex Deucher [Mon, 26 Feb 2018 18:34:13 +0000 (13:34 -0500)]
drm/amdgpu/powerplay/smu7: use proper dep table for mclk

For mclk od, use the vdd dependency on mclk table.  Looks
like a cut and paste typo.

Reviewed-by: Rex Zhu<rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/amdgpu: Correct VRAM width for APUs with GMC9
Tom St Denis [Mon, 26 Feb 2018 14:09:26 +0000 (09:09 -0500)]
drm/amd/amdgpu: Correct VRAM width for APUs with GMC9

DDR4 has a 64-bit width not 128-bits.  It was reporting
twice the width.  Tested with my Ryzen 2400G.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: cleanup ttm_tt_create
Christian König [Thu, 22 Feb 2018 07:54:57 +0000 (08:54 +0100)]
drm/ttm: cleanup ttm_tt_create

Cleanup ttm_tt_create a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: move ttm_tt_create into ttm_tt.c v2
Christian König [Thu, 22 Feb 2018 07:54:57 +0000 (08:54 +0100)]
drm/ttm: move ttm_tt_create into ttm_tt.c v2

Rename ttm_bo_add_ttm to ttm_tt_create and move it into ttm_tt.c.

v2: separate the cleanup.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: check if free mem space is under the lower limit
Roger He [Mon, 5 Feb 2018 09:57:07 +0000 (17:57 +0800)]
drm/ttm: check if free mem space is under the lower limit

the free mem space and the lower limit both include two parts:
system memory and swap space.

For the OOM triggered by TTM, that is the case as below:
first swap space is full of swapped out pages and soon
system memory also is filled up with ttm pages. and then
any memory allocation request will run into OOM.

to cover two cases:
a. if no swap disk at all or free swap space is under swap mem
   limit but available system mem is bigger than sys mem limit,
   allow TTM allocation;

b. if the available system mem is less than sys mem limit but
   free swap space is bigger than swap mem limit, allow TTM
   allocation.

v2: merge two memory limit(swap and system) into one
v3: keep original behavior except ttm_opt_ctx->flags with
    TTM_OPT_FLAG_FORCE_ALLOC
v4: always set force_alloc as tx->flags & TTM_OPT_FLAG_FORCE_ALLOC
v5: add an attribute for lower_mem_limit
v6: set lower_mem_limit as 0 to keep original behavior

Signed-off-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: drop persistent_swap_storage from ttm_bo_init and co
Christian König [Thu, 22 Feb 2018 14:52:31 +0000 (15:52 +0100)]
drm/ttm: drop persistent_swap_storage from ttm_bo_init and co

Never used as parameter, the only driver actually using this is nouveau
and there it is initialized after the BO is initialized.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: drop ttm->dummy_read_page
Christian König [Wed, 21 Feb 2018 19:34:13 +0000 (20:34 +0100)]
drm/ttm: drop ttm->dummy_read_page

Only used by the AGP backend and there it can be easily accessed using
ttm->bdev->glob.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: drop ttm->glob
Christian König [Wed, 21 Feb 2018 18:02:06 +0000 (19:02 +0100)]
drm/ttm: drop ttm->glob

The pointer is available as ttm->bdev->glob as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: drop bo->glob
Christian König [Wed, 21 Feb 2018 16:26:45 +0000 (17:26 +0100)]
drm/ttm: drop bo->glob

The pointer is available as bo->bdev->glob as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agostaging: vboxvideo: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 13:53:42 +0000 (14:53 +0100)]
staging: vboxvideo: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/bochs: remove the default ttm_tt_populate callbacks
Christian König [Thu, 22 Feb 2018 11:12:41 +0000 (12:12 +0100)]
drm/bochs: remove the default ttm_tt_populate callbacks

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/cirrus: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 11:11:25 +0000 (12:11 +0100)]
drm/cirrus: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/qxl: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 11:06:59 +0000 (12:06 +0100)]
drm/qxl: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ast: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 11:05:09 +0000 (12:05 +0100)]
drm/ast: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/hisilicon: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 11:03:58 +0000 (12:03 +0100)]
drm/hisilicon: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/mgag200: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 11:02:36 +0000 (12:02 +0100)]
drm/mgag200: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/virtio: remove ttm_pool_* wrappers
Christian König [Thu, 22 Feb 2018 11:01:38 +0000 (12:01 +0100)]
drm/virtio: remove ttm_pool_* wrappers

TTM calls the default implementation now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add default implementations for ttm_tt_(un)populate
Christian König [Thu, 22 Feb 2018 11:00:05 +0000 (12:00 +0100)]
drm/ttm: add default implementations for ttm_tt_(un)populate

Use ttm_pool_populate/ttm_pool_unpopulate if the driver doesn't provide
a function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Move common dpm check functions to hardwaremanager.c
Rex Zhu [Thu, 22 Feb 2018 12:46:49 +0000 (20:46 +0800)]
drm/amd/pp: Move common dpm check functions to hardwaremanager.c

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Cleaning up vega10_enable_dpm_tasks function
Rex Zhu [Fri, 23 Feb 2018 05:13:13 +0000 (13:13 +0800)]
drm/amd/pp: Cleaning up vega10_enable_dpm_tasks function

1. move display num initialize out of dpm enable tasks.
2. do not set/restore smc telemetry if dpm is runing.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Refine code in powerplay for Cz/Vega10
Rex Zhu [Thu, 22 Feb 2018 12:27:07 +0000 (20:27 +0800)]
drm/amd/pp: Refine code in powerplay for Cz/Vega10

Add dpm check functions on CZ/Vega10 to smu backend
function table.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove dead error checking code on Vega10
Rex Zhu [Thu, 22 Feb 2018 09:20:53 +0000 (17:20 +0800)]
drm/amd/pp: Remove dead error checking code on Vega10

when smu failed, print out the error info immediately
for debug. smum_send_msg_to_smu always return true,
so no need to check return value.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add debug info when smu failed on Vega10
Rex Zhu [Thu, 22 Feb 2018 08:50:57 +0000 (16:50 +0800)]
drm/amd/pp: Add debug info when smu failed on Vega10

When smu msssage failed, print out return value in dmesg.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove duplicated vega10_is_smc_ram_running calls
Rex Zhu [Thu, 22 Feb 2018 08:33:05 +0000 (16:33 +0800)]
drm/amd/pp: Remove duplicated vega10_is_smc_ram_running calls

Avoid conflicts in reading the same register mmPCIE_INDEX2
with other clients

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd: Remove inclusion of non-existing include directories
Corentin Labbe [Thu, 22 Feb 2018 08:21:49 +0000 (08:21 +0000)]
drm/amd: Remove inclusion of non-existing include directories

This patch fix the following build warnings:
  CC [M]  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o
cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs]
cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs]
  CC [M]  drivers/gpu/drm/amd/amdgpu/amdgpu_device.o
cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs]
cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs]
[...]
This warning is shown for each file in amdgpu directory, so it spams a lot.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd: remove inclusion of non-existing scheduler directory
Corentin Labbe [Thu, 22 Feb 2018 08:21:48 +0000 (08:21 +0000)]
drm/amd: remove inclusion of non-existing scheduler directory

The scheduler directory was removed via commit 1b1f42d8fde4 ("drm: move amd_gpu_scheduler into common location")
Remove it from include path.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE
Ben Crocker [Thu, 22 Feb 2018 22:52:19 +0000 (17:52 -0500)]
drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE

In radeon_device_init, set the need_dma32 flag for Cedar chips
(e.g. FirePro 2270).  This fixes, or at least works around, a bug
on PowerPC exposed by last year's commits

8e3f1b1d8255105f31556aacf8aeb6071b00d469 (Russell Currey)

and

253fd51e2f533552ae35a0c661705da6c4842c1b (Alistair Popple)

which enabled the 64-bit DMA iommu bypass.

This caused the device to freeze, in some cases unrecoverably, and is
the subject of several bug reports internal to Red Hat.

Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amdgpu: Remove duplicate setting of ->need_swiotlb
Thierry Reding [Tue, 20 Feb 2018 10:44:50 +0000 (11:44 +0100)]
drm/amdgpu: Remove duplicate setting of ->need_swiotlb

There's no need to set this before the number of DMA bits has been
properly determined.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add a pp feature mask bit for AutoWattman feature
Rex Zhu [Thu, 22 Feb 2018 09:45:11 +0000 (17:45 +0800)]
drm/amd/pp: Add a pp feature mask bit for AutoWattman feature

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Change default value of module parameter amdgpu_pp_feature_mask
Rex Zhu [Thu, 22 Feb 2018 09:39:22 +0000 (17:39 +0800)]
drm/amdgpu: Change default value of module parameter amdgpu_pp_feature_mask

Currently all pp features are enabled by default except
OVERDRIVE

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: fix thermal interrupts on vega10
Eric Huang [Thu, 22 Feb 2018 17:00:35 +0000 (12:00 -0500)]
drm/amd/powerplay: fix thermal interrupts on vega10

a bug in programming thermal interrupt register masks out
interrupts and driver cannot receive interrupts. Setting
0 to mask bits will fix it.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add query vram width in CGS query system info
Rex Zhu [Thu, 8 Feb 2018 07:57:10 +0000 (15:57 +0800)]
drm/amdgpu: Add query vram width in CGS query system info

powerplay need vram width to set default mclk optimization
settings(uphyst/downhyst/activity threshold)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use the TTM dummy page instead of allocating one
Christian König [Thu, 22 Feb 2018 07:35:11 +0000 (08:35 +0100)]
drm/amdgpu: use the TTM dummy page instead of allocating one

We have a global dummy page in TTM, use that one instead of allocating a
new one.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix bug that dpm level was not really locked
Rex Zhu [Fri, 9 Feb 2018 08:47:53 +0000 (16:47 +0800)]
drm/amd/pp: Fix bug that dpm level was not really locked

Lock the dpm levels when we use SW method to modify
the dpm tables directly to avoid a possible race
with the smu.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix error handling when smu return failed on Vega10.
Rex Zhu [Sun, 11 Feb 2018 04:38:58 +0000 (12:38 +0800)]
drm/amd/pp: Fix error handling when smu return failed on Vega10.

Clamp the clock index to a valid range when reading it back

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: set TTM_OPT_FLAG_FORCE_ALLOC in ttm_bo_force_list_clean
Roger He [Tue, 6 Feb 2018 07:00:06 +0000 (15:00 +0800)]
drm/ttm: set TTM_OPT_FLAG_FORCE_ALLOC in ttm_bo_force_list_clean

Because ttm_bo_force_list_clean() is only called on two occasions:
1. By ttm_bo_evict_mm() during suspend.
2. By ttm_bo_clean_mm() when the driver unloads.
On both cases we absolutely don't want any memory allocation failure.

Signed-off-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add bit flag TTM_OPT_FLAG_FORCE_ALLOC
Roger He [Wed, 17 Jan 2018 07:07:23 +0000 (15:07 +0800)]
drm/ttm: add bit flag TTM_OPT_FLAG_FORCE_ALLOC

set TTM_OPT_FLAG_FORCE_ALLOC when we are servicing for page
fault routine.

for ttm_mem_global_reserve if in page fault routine, allow the gtt
pages reservation always. because page fault routing already grabbed
system memory and the allowance of this exception is harmless.
Otherwise, it will trigger OOM killer.

will be used later.

v2: set the FORCE_ALLOC always
v3: minor refine

Signed-off-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: use bit flag to replace allow_reserved_eviction in ttm_operation_ctx
Roger He [Tue, 6 Feb 2018 03:22:57 +0000 (11:22 +0800)]
drm/ttm: use bit flag to replace allow_reserved_eviction in ttm_operation_ctx

for saving memory and more bit flag can be used in future

Signed-off-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoradeon: hide pointless #warning when compile testing
Arnd Bergmann [Fri, 16 Feb 2018 15:26:57 +0000 (16:26 +0100)]
radeon: hide pointless #warning when compile testing

In randconfig testing, we sometimes get this warning:

drivers/gpu/drm/radeon/radeon_object.c: In function 'radeon_bo_create':
drivers/gpu/drm/radeon/radeon_object.c:242:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp]
 #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \

This is rather annoying since almost all other code produces no build-time
output unless we have found a real bug. We already fixed this in the
amdgpu driver in commit 31bb90f1cd08 ("drm/amdgpu: shut up #warning for
compile testing") by adding a CONFIG_COMPILE_TEST check last year and
agreed to do the same here, but both Michel and I then forgot about it
until I came across the issue again now.

For stable kernels, as this is one of very few remaining randconfig
warnings in 4.14.

Cc: stable@vger.kernel.org
Link: https://patchwork.kernel.org/patch/9550009/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: set page mapping during allocation
Christian König [Thu, 1 Feb 2018 13:52:50 +0000 (14:52 +0100)]
drm/ttm: set page mapping during allocation

To aid debugging set the page mapping during allocation instead of
during VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRevert "drm/radeon/pm: autoswitch power state when in balanced mode"
Alex Deucher [Thu, 15 Feb 2018 13:40:30 +0000 (08:40 -0500)]
Revert "drm/radeon/pm: autoswitch power state when in balanced mode"

This reverts commit 1c331f75aa6ccbf64ebcc5a019183e617c9d818a.

Breaks resume on some systems.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=100759
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/radeon: use drm_gem_private_object_init
Christian König [Fri, 16 Feb 2018 09:08:24 +0000 (10:08 +0100)]
drm/radeon: use drm_gem_private_object_init

We use our own backing store and don't need the shmem file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use drm_gem_private_object_init
Christian König [Fri, 16 Feb 2018 08:52:51 +0000 (09:52 +0100)]
drm/amdgpu: use drm_gem_private_object_init

We use our own backing store and don't need the shmem file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: mitigate workaround for i915
Christian König [Mon, 19 Feb 2018 10:29:35 +0000 (11:29 +0100)]
drm/amdgpu: mitigate workaround for i915

To be able to use DRI_PRIME with amdgpu and i915 we add all our fences
only as exclusive ones.

Disable that behavior when sharing between amdgpu itself cause it
hinders concurrent execution.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: implement amdgpu_gem_map_(attach/detach)
Christian König [Fri, 16 Feb 2018 12:16:11 +0000 (13:16 +0100)]
drm/amdgpu: implement amdgpu_gem_map_(attach/detach)

Instead of the pin/unpin callback implement the attach/detach ones.

Functional identical, but allows us access to the attachment.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switching
Alex Deucher [Tue, 13 Feb 2018 19:37:36 +0000 (14:37 -0500)]
drm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switching

The logic has moved to cgs.  mclk switching with DC at higher refresh
rates should work.

Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
6 years agodrm/amdgpu/cgs: add refresh rate checking to non-DC display code
Alex Deucher [Tue, 13 Feb 2018 19:33:51 +0000 (14:33 -0500)]
drm/amdgpu/cgs: add refresh rate checking to non-DC display code

Clamp the vblank period to 0 if the refresh rate is larger than
120 hz for non-DC.  This allows us to remove the refresh rate
checks from powerplay for mclk switching.

Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay/smu7: allow mclk switching with no displays
Alex Deucher [Tue, 13 Feb 2018 19:26:54 +0000 (14:26 -0500)]
drm/amd/powerplay/smu7: allow mclk switching with no displays

If there are no displays attached, there is no reason to disable
mclk switching.

Fixes mclks getting set to high when there are no displays attached.

Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amd/powerplay/vega10: allow mclk switching with no displays
Alex Deucher [Tue, 13 Feb 2018 19:25:11 +0000 (14:25 -0500)]
drm/amd/powerplay/vega10: allow mclk switching with no displays

If there are no displays attached, there is no reason to disable
mclk switching.

Fixes mclks getting set to high when there are no displays attached.

Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amd/powerplay: use PP_CAP macro for disable_mclk_switching_for_frame_lock
Alex Deucher [Tue, 13 Feb 2018 19:22:46 +0000 (14:22 -0500)]
drm/amd/powerplay: use PP_CAP macro for disable_mclk_switching_for_frame_lock

Rather than open coding it.

Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: remove unused headers
Corentin Labbe [Wed, 14 Feb 2018 14:46:17 +0000 (14:46 +0000)]
drm/amd/powerplay: remove unused headers

All thoses headers are not used by any source files.
Lets just remove them.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu_gem: fix error handling path in amdgpu_gem_va_update_vm
Gustavo A. R. Silva [Thu, 15 Feb 2018 05:20:00 +0000 (23:20 -0600)]
drm/amdgpu_gem: fix error handling path in amdgpu_gem_va_update_vm

Currently, if amdgpu_vm_bo_update() fails, the returned error
is being ignored.

Fix this by properly checking _r_ after calling amdgpu_vm_bo_update.
Also, remove redundant code just before label _error_.

Addresses-Coverity-ID: 1464280 ("Unused value")
Fixes: 0abc6878fc2d ("drm/amdgpu: update VM PDs after the PTs")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: update the PASID mapping only on demand
Christian König [Mon, 5 Feb 2018 16:38:01 +0000 (17:38 +0100)]
drm/amdgpu: update the PASID mapping only on demand

Updating the PASID is rather heavyweight and shouldn't be done all the
time.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: separate PASID mapping from VM flush v2
Christian König [Sun, 4 Feb 2018 09:32:35 +0000 (10:32 +0100)]
drm/amdgpu: separate PASID mapping from VM flush v2

Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix increment when sampling OTF in DCE
Leo (Sunpeng) Li [Fri, 9 Feb 2018 17:51:01 +0000 (12:51 -0500)]
drm/amd/display: Fix increment when sampling OTF in DCE

Previously, the number of software segmets per region was reduced to 16.
This needs to be reflected in the sampling distance (increment) used when
translating to the hardware format.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: De PQ implementation
Vitaly Prosyak [Tue, 6 Feb 2018 21:06:23 +0000 (15:06 -0600)]
drm/amd/display: De PQ implementation

Some refactoring and optimizations in color module.
Added de gamma 2.2 & 2.4, also re gamma 2.2.
Added interface for diagnostic for de gamma & de pq.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove unused dm_pp_ interfaces
Harry Wentland [Mon, 5 Feb 2018 23:41:45 +0000 (18:41 -0500)]
drm/amd/display: Remove unused dm_pp_ interfaces

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add logging for aux DPCD access
Eric Yang [Tue, 6 Feb 2018 22:28:46 +0000 (17:28 -0500)]
drm/amd/display: Add logging for aux DPCD access

Add basic logging for DPCD access. Does not print
by default.

Currently only prints first byte of the data accessed.

Technical debt: Need to make it so that the entire
data block accessed is printed. Also need to log
address space that's not DPCD.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set vsc pack revision when DPCD revision is >= 1.2
Tao [Thu, 8 Feb 2018 21:04:25 +0000 (16:04 -0500)]
drm/amd/display: Set vsc pack revision when DPCD revision is >= 1.2

Brightness couldn't change when booting up in DC mode.
It was because "psr_enabled" flag was not set to true before
setting vsc packet revision, causing packet rev setup was skipped.
Now instead of checking the psr flag, it checks if the DPCD_REV >= 1.2
and set the vsc packet revision.

Signed-off-by: Tao <xtao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: provide an interface to query firmware version
Anthony Koo [Thu, 8 Feb 2018 04:25:43 +0000 (23:25 -0500)]
drm/amd/display: provide an interface to query firmware version

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add missing Vega defines to dal_asic_id
Harry Wentland [Thu, 1 Feb 2018 16:29:58 +0000 (11:29 -0500)]
drm/amd/display: Add missing Vega defines to dal_asic_id

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Treat bad EDID as no EDID
Eric Yang [Thu, 8 Feb 2018 19:05:14 +0000 (14:05 -0500)]
drm/amd/display: Treat bad EDID as no EDID

We have an mst dock firmware that will emulate an EDID with bad
checksum.

v2: Tread -> Treat

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove duplicate entries from BIOS function table
Ken Chalmers [Wed, 7 Feb 2018 19:58:53 +0000 (14:58 -0500)]
drm/amd/display: Remove duplicate entries from BIOS function table

Identical to the two entries above them.

Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Make FBC work without fbdev emulation
Roman Li [Tue, 6 Feb 2018 23:47:26 +0000 (18:47 -0500)]
drm/amd/display: Make FBC work without fbdev emulation

Previously, FBC dynamic allocation relied on connector modes
populated during dm init. This is only the case if
DRM_FBDEV_EMULATION config flag is enabled.
Moving fbc allocation from dm_late_init() to
amdgpu_dm_connector_get_modes() where actual modes init happens.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Shirish Shankarappa <Shirish.S@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove delay on disconnect patch
John Barberiz [Tue, 6 Feb 2018 17:25:17 +0000 (12:25 -0500)]
drm/amd/display: Remove delay on disconnect patch

HDMI HPD's generic solution makes the monitor
patch code unnecessary so anything related has
been removed.

Signed-off-by: John Barberiz <jbarberi@amd.com>
Reviewed-by: John Barberiz <jbarberi@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Skip 2 frames when first reading CRC
Leo (Sunpeng) Li [Tue, 6 Feb 2018 15:20:46 +0000 (10:20 -0500)]
drm/amd/display: Skip 2 frames when first reading CRC

Skipping the first frame will prevent uncoooked values most of the time.
However, in some unlikely cases, the second frame will be uncooked as
well.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Expose DCE110 CRC functions for DCE8
Leo (Sunpeng) Li [Mon, 5 Feb 2018 21:11:19 +0000 (16:11 -0500)]
drm/amd/display: Expose DCE110 CRC functions for DCE8

Implement CRC for DCE8. Registers remain the same, so call DCE110 code
directly.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Rework DCE transform bit depth reduction programming.
Leo (Sunpeng) Li [Tue, 6 Feb 2018 21:35:21 +0000 (16:35 -0500)]
drm/amd/display: Rework DCE transform bit depth reduction programming.

Clear up the logic, and enable programming truncation as a bit reduction
mode.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: When enabling CRC, disable dither & enable truncation
Leo (Sunpeng) Li [Tue, 23 Jan 2018 22:43:37 +0000 (17:43 -0500)]
drm/amd/display: When enabling CRC, disable dither & enable truncation

When user-mode is using 8bpc, the hardware represents it internally
using a higher bit depth. This causes problems when comparing CRCs for
color managment tests.

We need to disable dithering as well, since it makes CRC values
non-deterministic.

It's easy to see why dithering needs to be disabled, The reason why
truncation also needs to be enabled is better described with an example.
Consider the folowing which tests the color transform matrix (CTM):

Expected CRC = FB_A -> Degamma (Bypassed) -> CTM (Bypassed)
                                                  |
                                                  v
                            Obtain CRC  <- Regamma(Bypassed)

Actual CRC = FB_B -> Degamma (Bypassed) -> CTM (0.5*Identity)
                                                  |
                                                  v
                            Obtain CRC  <- Regamma(Bypassed)

FB_A contains a solid red color at half intensity (127 @ 8bpc)
FB_B contains a solid red color at full intensity (255 @ 8bpc)

We expect that Expected CRC = Actual CRC, but that's not the case. When
the CTM is applied, the output is at half intensity, but also at a
higher bit depth within hardware. i.e. 255/2 = 127.5: not representable
in 8bpc, but can be at 10bpc. This causes the two CRC's to be different.

The solution is to truncate the output bit depth to the same as input
when enabling CRC capture. Since Linux only supports 8bpc, hard code
that for now.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Expose dither setting functionality to Linux
Leo (Sunpeng) Li [Tue, 6 Feb 2018 14:50:49 +0000 (09:50 -0500)]
drm/amd/display: Expose dither setting functionality to Linux

We will need this to disable dither for CRC capture.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Refactor max color lut entries into a macro.
Leo (Sunpeng) Li [Tue, 30 Jan 2018 16:14:27 +0000 (11:14 -0500)]
drm/amd/display: Refactor max color lut entries into a macro.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Hookup color management functions
Leo (Sunpeng) Li [Fri, 2 Feb 2018 15:18:56 +0000 (10:18 -0500)]
drm/amd/display: Hookup color management functions

Hookup new color management functions into amdgpu_dm:

- Notify DRM that we support CRTC color management during CRTC init
- Call color management functions within atomic check to update dc
  states in preparation for a commit

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Implement color management
Leo (Sunpeng) Li [Fri, 2 Feb 2018 15:18:05 +0000 (10:18 -0500)]
drm/amd/display: Implement color management

Implement color management functionalities within amdgpu_dm_color, and
expose functions within amdgpu_dm.h.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add color module's gamma helpers to Linux build
Leo (Sunpeng) Li [Mon, 5 Feb 2018 19:29:57 +0000 (14:29 -0500)]
drm/amd/display: Add color module's gamma helpers to Linux build

Also guard includes that we don't need.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Use hardware max low point when sampling OTF
Leo (Sunpeng) Li [Fri, 2 Feb 2018 14:46:41 +0000 (09:46 -0500)]
drm/amd/display: Use hardware max low point when sampling OTF

The MAX_LOW_POINT macro should reflect the maximum low point within
hardware. Otherwise, sampling for the hardware points from the output
transfer function (OTF) will be incorrect.

Also, fix usage of MAX_LOW_POINT accordingly.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Make couple functions in DCE80 TG static
Harry Wentland [Wed, 24 Jan 2018 16:23:28 +0000 (11:23 -0500)]
drm/amd/display: Make couple functions in DCE80 TG static

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Re-use DCE100 display_power_gating for DCE80
Harry Wentland [Wed, 24 Jan 2018 16:16:49 +0000 (11:16 -0500)]
drm/amd/display: Re-use DCE100 display_power_gating for DCE80

Both functions are the same

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove unused DCE80 compressor
Harry Wentland [Wed, 24 Jan 2018 15:47:37 +0000 (10:47 -0500)]
drm/amd/display: Remove unused DCE80 compressor

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Keep eDP stream enabled during boot.
Yongqiang Sun [Fri, 2 Feb 2018 22:35:00 +0000 (17:35 -0500)]
drm/amd/display: Keep eDP stream enabled during boot.

This path fixed specific eDP panel cold boot black screen
due to unnecessary enable link.
Change:
In case of boot up with eDP, if OS is going to set mode
on eDP, keep eDP light up, do not disable and reset corresponding
HW.
This change may affect dce asics and S3/S4 Resume with multi-monitor.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.34
Tony Cheng [Fri, 2 Feb 2018 06:16:47 +0000 (01:16 -0500)]
drm/amd/display: dal 3.1.34

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: disable seamless vp adjustment for mirrored surface
Dmytro Laktyushkin [Mon, 29 Jan 2018 21:34:16 +0000 (16:34 -0500)]
drm/amd/display: disable seamless vp adjustment for mirrored surface

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add monitor patch for delay after DP receive power up
Martin Tsai [Thu, 1 Feb 2018 12:03:17 +0000 (20:03 +0800)]
drm/amd/display: add monitor patch for delay after DP receive power up

Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Change blackout time to 0 on CZ/ST
Harry Wentland [Tue, 30 Jan 2018 19:58:42 +0000 (14:58 -0500)]
drm/amd/display: Change blackout time to 0 on CZ/ST

These should only be non-0 if big hammer w/a is implemented. Currently
DC doesn't implement it, so leave them 0.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add force_trigger even to static screen control
Charlene Liu [Thu, 1 Feb 2018 20:16:20 +0000 (15:16 -0500)]
drm/amd/display: add force_trigger even to static screen control

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.33
Tony Cheng [Thu, 1 Feb 2018 20:32:55 +0000 (15:32 -0500)]
drm/amd/display: dal 3.1.33

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: boot up/S4 fix mainlink off before BL.
Charlene Liu [Wed, 31 Jan 2018 21:45:26 +0000 (16:45 -0500)]
drm/amd/display: boot up/S4 fix mainlink off before BL.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: VGA black screen from s3 when attached to hook
Hersen Wu [Tue, 30 Jan 2018 16:46:16 +0000 (11:46 -0500)]
drm/amd/display: VGA black screen from s3 when attached to hook

[Description] For MST, DC already notify MST sink for MST mode, DC stll
check DP SINK DPCD register to see if MST enabled. DP RX firmware may
not handle this properly.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Rearchitecture HDMI HPD
John Barberiz [Fri, 26 Jan 2018 22:39:19 +0000 (17:39 -0500)]
drm/amd/display: Rearchitecture HDMI HPD

- Disabled HPD filter and used HPD software timer instead
- Allows DM to disable HPD filtering

Signed-off-by: John Barberiz <jbarberi@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Fix potential uninitialized use of 'idle' in amdgpu_ids.c
Harry Wentland [Fri, 9 Feb 2018 17:15:45 +0000 (12:15 -0500)]
drm/amdgpu: Fix potential uninitialized use of 'idle' in amdgpu_ids.c

v2: Use NULL and reverse christmas tree ordering

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Unify the dm resume calls into one
Mikita Lipski [Sat, 3 Feb 2018 20:19:20 +0000 (15:19 -0500)]
drm/amdgpu: Unify the dm resume calls into one

amdgpu_dm_display_resume is now called from dm_resume to
unify DAL resume call into a single function call

There is no more need to separately call 2 resume functions
for DM.

Initially they were separated to resume display state after
cursor is pinned. But because there is no longer any corruption
with the cursor - the calls can be merged into one function hook.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add a missing lock for drm_mm_takedown
Mikita Lipski [Fri, 19 Jan 2018 16:21:04 +0000 (11:21 -0500)]
drm/amdgpu: Add a missing lock for drm_mm_takedown

Inside amdgpu_gtt_mgr_fini add a missing lock to maintain
locking balance

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: cleanup VCN IB generation
Christian König [Wed, 7 Feb 2018 19:48:22 +0000 (20:48 +0100)]
drm/amdgpu: cleanup VCN IB generation

Start to use amdgpu_bo_create_reserved v2.

v2:
Fix missing pointer init to NULL.
Remove extra new lines.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Tested-and-Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix and cleanup UVD IB generation
Christian König [Wed, 7 Feb 2018 19:48:21 +0000 (20:48 +0100)]
drm/amdgpu: fix and cleanup UVD IB generation

We didn't synced the BO after validating it. Also sart to use
amdgpu_bo_create_reserved to simplify things.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove unused CFLAGS entry in DML Makefile
Harry Wentland [Thu, 8 Feb 2018 21:46:30 +0000 (16:46 -0500)]
drm/amd/display: Remove unused CFLAGS entry in DML Makefile

Missed that with a previous change that removed unused files.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: remove extra TT unpopulated check
Christian König [Thu, 1 Feb 2018 13:41:37 +0000 (14:41 +0100)]
drm/radeon: remove extra TT unpopulated check

The subsystem should check that, not the driver.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>