drm/amd/display: Remove check update type function.
Due to using dc_commit_surface_to_stream instead of build
stream and surface updates any surface commit today is
evlauted to full. Until we fix this and can corretly
evluate type of surface update, anything which is not page
flip or cursor update will be treted as full update chnage
and global lock will be aquired.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Wed, 14 Jun 2017 14:19:57 +0000 (10:19 -0400)]
drm/amd/display: fix issues with incorrectly detecting UPDATE_TYPE_FULL
This is due to how structures are being packed with padding added.
Structure field initialization doesn't clear the padding bytes, which cause
our memcmp to give incorrect result.
Move smaller structure parameters to end of structure.
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Tue, 13 Jun 2017 15:54:10 +0000 (11:54 -0400)]
drm/amd/display: Save hpd_src for dc_link
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 9 Jun 2017 14:12:36 +0000 (10:12 -0400)]
drm/amd/display: Don't call DCN clk code for Vega
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1) Always call flip ISR, for any surface comit, not only for page flip.
2) For events not signaled in flip ISR, handle them in end of commit_tail.
3)Fix race condition between subsequent atomic calls by removing
current state access AFTER drm_atomic_helper_commit_hw_done
was called. After this call a pending next commit will
swap in his own state into objects and proceed.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 8 Jun 2017 06:25:06 +0000 (11:55 +0530)]
drm/amd/display: remove get_position() of underlay
get_position() returns CRTC vertical/horizontal counters,
hence it is not applicable for underlay which is plane and not
attached to one crtc.
This patch hence removes the callback from dce110_tg_v_funcs
and hence fixes a bug in dc_debug.c where in
get_position() for underlay pipe is called un-conditionally.
Witout this patch get_position() is called in case one has
to update underlay plane's data,
since callback implmented with an ASSERT(),
the old_surface_count and new_surface_count mismatches; causing
only one plane update which is not right and also assert makes the
rendering slow.
Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Thu, 8 Jun 2017 18:26:40 +0000 (14:26 -0400)]
drm/amd/display: disable dcc when reset front end.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 6 Jun 2017 20:41:00 +0000 (16:41 -0400)]
drm/amd/display: Use surface update inuse for pending check.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Tue, 6 Jun 2017 20:30:51 +0000 (16:30 -0400)]
drm/amd/display: Temporary disable BTR FreeSync support for now
Reduce timer tick interval for the static screen
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Fri, 2 Jun 2017 21:25:49 +0000 (17:25 -0400)]
drm/amd/display: Call program_gamut explicitly instead of entire set_plane
This fixes on boot crush on Vega, Polaris with Dal3.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Mon, 5 Jun 2017 21:56:05 +0000 (17:56 -0400)]
drm/amd/display: Add function to log connectivity
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Fri, 2 Jun 2017 20:33:47 +0000 (16:33 -0400)]
drm/amd/display: Fix DRR Enable on Desktop
- Block PSR in Full screen apps to prevent incorrect static screen curser events
- Reprogram static screen events when update freesync state
- Program static ramp variable active after other values are programmed
- Correct wrong assigning of the nominal and current vcount
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 2 Jun 2017 10:15:57 +0000 (06:15 -0400)]
drm/amd/display: disable forced stutter disable after programming watermark
vbios will disable stutter pre-OS. driver re-enable after programming watermark
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Do not broadcast (to DRM) unsupported RGB formats.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Remove redundant member from amdgpu_plane.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Switch from legacy cursor to DRM cursor plane. Cursor
is not an actual plane but more of a subplane of each
pipe. Bind a DRM cursor plane instance to each CRTC.
Eliminate seperate FB object allocation for cursor and
clean dm_crtc_cursor_set.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 25 May 2017 22:00:37 +0000 (18:00 -0400)]
drm/amd/display: Don't commit surfaces if no stream
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 25 May 2017 09:06:47 +0000 (14:36 +0530)]
drm/amd/display: update NV12/NV21 as the YUV format
This patch updates the YUV format supported to
NV12 and NV21 and hence updates the offsets.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format NV12 --size
500x500
Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jeff Smith [Fri, 19 May 2017 13:32:23 +0000 (08:32 -0500)]
drm/amd/display: default spd packet to invalid
Signed-off-by: Jeff Smith <whydoubt@gmail.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 25 May 2017 09:10:21 +0000 (14:40 +0530)]
drm/amd/display: re-order the luma chroma addres updation
The DCE engine triggers scan as soon as the luma
address is updated, since it is updated before chroma address
the chroma data is not scanned out properly or in order.
This patch fixes this by re-ordering the same.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format NV12 --size 500x500
* Chroma data is scanned properly.
Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jerry Zuo [Wed, 24 May 2017 15:01:32 +0000 (11:01 -0400)]
drm/amd/display: fix NULL pointer in dm_commit_surfaces
Check if adding surface is failed to prevent NULL pointer deref.
Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Fri, 19 May 2017 19:52:00 +0000 (15:52 -0400)]
drm/amd/display: Add FORCE_HDR timing flag
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Allow update stream without surface
Passing NULL as surfaceUpdates to dc_update_surfaces_and_stream now
updates just the stream. Code that is dependent on srf_updates was moved
below the NULL check.
Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Tue, 23 May 2017 21:15:54 +0000 (17:15 -0400)]
drm/amd/display: Add disable_psr debug flag
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix handling of scaling and underscan.
Summury of changes:
1: Both in check and commit Connector properties were handled as
part of for_each(crtc) loop while they shoud have been handled
in a dedicated for_each(connector)
loop since they are connector properties. Moved.
2: Removed hacky plane add in amdgpu_dm_connector_atomic_set_property
to force iteration on plane forconnector property. This was
causing double call to commit_surface_for_stream both in crtc loop
and plane loop.
3: Remove middleman DC interface and call dc_commit_surfaces_to_stream
directly to increase code clarity.
Remove it from atomic_commit.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 19 May 2017 02:13:19 +0000 (22:13 -0400)]
drm/amd/display: Limit DCN to x86 arch
DCN bw calcs currently rely on the following gcc options:
-mhard-float -msse -mpreferred-stack-boundary=4
We probably shouldn't really try building this on architectures
other than x86.
CC: Alex Deucher <Alexander.Deucher@amd.com> CC: Christian König <christian.koenig@amd.com> CC: Michel Dänzer <michel.daenzer@amd.com> CC: Tony Cheng <Tony.Cheng@amd.com> CC: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andrey Grodzovsky<andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 18 May 2017 15:40:53 +0000 (11:40 -0400)]
drm/amd/display: Remove unused addr var in TG
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: remove GRPH_SURFACE_UPDATE_IMMEDIATE_EN field programming
This is causing asserts for dce 8 and 10 since they do not contain this
field. It is also unnecessary for later DCEs as it is left in it's
default state of 0
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
need to program DCSURF_PRIMARY_SURFACE_ADDRESS last as HW automatically
latch rest of addr regs on write when SURFACE_UPDATE_LOCK is not used
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:05 +0000 (10:22 -0400)]
drm/amd/display: Tidy up mem_input_program_surface_flip_and_addr()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:04 +0000 (10:22 -0400)]
drm/amd/display: Tidy up dce120_clock_source_create()
Also change sizeof to be automatic based on type declaration.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:03 +0000 (10:22 -0400)]
drm/amd/display: Clean up indentation in dce120_tg_set_blank()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:02 +0000 (10:22 -0400)]
drm/amd/display: Make dce120_tg_is_blanked() more legible
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:01 +0000 (10:22 -0400)]
drm/amd/display: Fix indentation in dce120_tg_program_timing()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:00 +0000 (10:22 -0400)]
drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request()
Simplify the function by removing identical looking code blocks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ayyappa Chandolu [Fri, 12 May 2017 11:35:55 +0000 (17:05 +0530)]
drm/amd/display: Fix ASSR enablement on DP to EDP converter
ASSR mode is not enable when we connect eDP panel via DP to eDP converter.
connector_signal is coming as SIGNAL_TYPE_DISPLAY_PORT. Present code
ignoring panel_mode_edp for SIGNAL_TYPE_DISPLAY_PORT. Added checking
panel_mode_edp for all signals.
Signed-off-by: Ayyappa Chandolu <Ayyappa.Chandolu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 20:07:30 +0000 (16:07 -0400)]
drm/amd/display: Implement input gamma LUT
1. Implemented dcn10_ipp_program_input_lut(), following the existing
interface.
2. Added missing registers as needed
3. Change to REG_GET for *ram_select() funcs.
4. Removed gamma table init from DiagsDM::make_surface() for resolving
CRC errors. Reason: Legacy LUT will be deprecated soon for Raven in
favor of degamma/regamma.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 17:52:28 +0000 (13:52 -0400)]
drm/amd/display: Refactor use_lut() from dce110 to dce
use_lut() checks if the input surface's pixel format is compatible with
a 256 entry LUT. This function can be used across different versions and
not just dce11.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 17 May 2017 16:07:30 +0000 (12:07 -0400)]
drm/amd/display: Fix 5th display lightup on Vega10
- fixing bug in calculation of reg offset for D5VGA_CONTROL
Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Unify loop for surface update and page flip.
Remove extra loop we have for page flips and do flips in same loop we do
for surface create/update.
Add documentation for synchronization between commits on different crtcs.
Rename function to have DM prefix.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 13:55:20 +0000 (09:55 -0400)]
drm/amd/display: Fix dcn10 cursor set position hang
Calling dcn10_cursor_set_position() before dcn10_cursor_set_attributes()
with invalid (0-value) attributes can cause the ASIC to hang. This fix
checks that address.quadpart is non-zero within set_position before calling
set_attributes.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Use dc_update_surfaces_for_stream for flip.
Today we use special interface for flip because of fear of cuncurency issues
over dc->current_ctx. This should be no longer an issue when flipping on
multiple CRTCs concurently since for fast update (as flip is) no new context
is created and the exsisitng is not destroyed. For full updates case when
removing or adding streams on once CRTC while flipping on another
Adding all current active CRTC's states to the atomic commit in
amdgpu_dm_atomic_check will garntee that any such full update commit
will wait for completion of any outstanding flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>