From 0b09a91a0d053c78429a0f0ffd169d7afcba70a7 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Tue, 9 Jan 2018 17:47:47 +0100 Subject: [PATCH] ARM: dts: STi: Add fake reg property for sti-display-subsystem As sti-display-subsystem sub-nodes (sti-compositor, sti-tvout sti-hdmi, sti-hda and sti-hqvdp) are SoC's IP, we add a fake reg property. This allows to fix the following warning when compiling dtb with W=1 option: arch/arm/boot/dts/stih410-b2120.dtb: Warning (unit_address_vs_reg): Node /soc/sti-display-subsystem/sti-hda@8d02000 has a unit name, but no reg property Signed-off-by: Patrice Chotard --- arch/arm/boot/dts/stih407.dtsi | 4 ++-- arch/arm/boot/dts/stih410-b2120.dts | 2 +- arch/arm/boot/dts/stih410.dtsi | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi index 11fdecd9312e..4f01777082f5 100644 --- a/arch/arm/boot/dts/stih407.dtsi +++ b/arch/arm/boot/dts/stih407.dtsi @@ -11,11 +11,11 @@ #include / { soc { - sti-display-subsystem { + sti-display-subsystem@0 { compatible = "st,sti-display-subsystem"; #address-cells = <1>; #size-cells = <1>; - + reg = <0 0>; assigned-clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>, <&clk_s_c0_pll1 0>, diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts index 37a42afa0dd1..23199b1b0991 100644 --- a/arch/arm/boot/dts/stih410-b2120.dts +++ b/arch/arm/boot/dts/stih410-b2120.dts @@ -61,7 +61,7 @@ ehci1: usb@9a83e00 { status = "okay"; }; - sti-display-subsystem { + sti-display-subsystem@0 { sti-hda@8d02000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index e4b7e3ddc9ee..d9f964702933 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -102,11 +102,12 @@ ehci1: usb@9a83e00 { status = "disabled"; }; - sti-display-subsystem { + sti-display-subsystem@0 { compatible = "st,sti-display-subsystem"; #address-cells = <1>; #size-cells = <1>; + reg = <0 0>; assigned-clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>, <&clk_s_c0_pll1 0>, -- 2.45.2