From 0b8794e252fcf47d840985dde1d7a4f8802b61a7 Mon Sep 17 00:00:00 2001 From: Jack Xiao Date: Thu, 18 Apr 2019 17:37:14 +0800 Subject: [PATCH] drm/amdgpu/vcn2: don't access register when power gated It will cause bus hang to access register UVD_STATUS when VCN is in the state of power gated. Signed-off-by: Jack Xiao Acked-by: Alex Deucher Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c index 36a80e487b8d..04cac0bb5900 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c @@ -277,7 +277,8 @@ static int vcn_v2_0_hw_fini(void *handle) struct amdgpu_ring *ring = &adev->vcn.ring_dec; int i; - if (RREG32_SOC15(VCN, 0, mmUVD_STATUS)) + if (adev->vcn.cur_state != AMD_PG_STATE_GATE && + RREG32_SOC15(VCN, 0, mmUVD_STATUS)) vcn_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE); ring->sched.ready = false; -- 2.45.2