From 0c29339d53bf7cf3b96847081ad7f64e835de4d4 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 3 Dec 2018 15:40:19 -0200 Subject: [PATCH] ARM: dts: imx6ul: Correct mask for GIC PPI interrupts The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual number of CPU cores the interrupt controller is wired to. i.MX6UL contains a single Cortex-A7, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)". Tested on a imx6ul-evk. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 99c366303d73..0efc85f1bb95 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -94,7 +94,7 @@ cpu0: cpu@0 { intc: interrupt-controller@a01000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; - interrupts = ; + interrupts = ; #interrupt-cells = <3>; interrupt-controller; interrupt-parent = <&intc>; @@ -106,10 +106,10 @@ intc: interrupt-controller@a01000 { timer { compatible = "arm,armv7-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; interrupt-parent = <&intc>; status = "disabled"; }; -- 2.45.2