From 29c3035fe385b4214fc0515b9cd0ff53d23b4e82 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Sat, 2 Sep 2017 02:16:35 -0400 Subject: [PATCH] drm/amdgpu/gfx9: properly set the hdp flush reg for Raven Was only being assigned for vega10. Reviewed-by: Junwei Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 2ab049c45b1d..72dbf890c65b 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -3504,7 +3504,9 @@ static void gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) u32 ref_and_mask, reg_mem_engine; struct nbio_hdp_flush_reg *nbio_hf_reg; - if (ring->adev->asic_type == CHIP_VEGA10) + if (ring->adev->flags & AMD_IS_APU) + nbio_hf_reg = &nbio_v7_0_hdp_flush_reg; + else nbio_hf_reg = &nbio_v6_1_hdp_flush_reg; if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) { -- 2.45.2