From 3454a034b715a3b89f8efb92508ccc9fbee17e6f Mon Sep 17 00:00:00 2001 From: Alexandre Courbot Date: Wed, 14 Dec 2016 17:02:42 +0900 Subject: [PATCH] drm/nouveau/secboot: disable falcon interrupts when running blob Make sure we are not disturbed by spurious interrupts, as we poll the halt bit anyway. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c index f6a11e2a8434..2fcb2f761a54 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c @@ -27,6 +27,7 @@ #include #include #include +#include /** * gm200_secboot_run_blob() - run the given high-secure blob @@ -63,6 +64,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob) if (ret) goto end; + /* Disable interrupts as we will poll for the HALT bit */ + nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false); + /* Start the HS bootloader */ nvkm_falcon_set_start_addr(falcon, sb->acr->start_address); nvkm_falcon_start(falcon); @@ -79,6 +83,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob) } end: + /* Reenable interrupts */ + nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, true); + /* We don't need the ACR firmware anymore */ nvkm_gpuobj_unmap(&vma); nvkm_falcon_put(falcon, subdev); -- 2.45.2