From 45ba63a29fd9b8a461110185e3abc5b4c90b806a Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 20 May 2018 16:31:15 +0000 Subject: [PATCH] clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle When the main processor goes idle, by default its clock is stopped. However, this also stops the clock of the co-processor. Here, if the C1CLK clock is enabled, we disable this functionality. Signed-off-by: Paul Cercueil Signed-off-by: Stephen Boyd --- drivers/clk/ingenic/jz4770-cgu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/ingenic/jz4770-cgu.c b/drivers/clk/ingenic/jz4770-cgu.c index 226c8016f6b0..a5ad69464e57 100644 --- a/drivers/clk/ingenic/jz4770-cgu.c +++ b/drivers/clk/ingenic/jz4770-cgu.c @@ -162,9 +162,10 @@ static const struct ingenic_cgu_clk_info jz4770_cgu_clocks[] = { .div = { CGU_REG_CPCCR, 16, 1, 4, 22, -1, -1 }, }, [JZ4770_CLK_C1CLK] = { - "c1clk", CGU_CLK_DIV, + "c1clk", CGU_CLK_DIV | CGU_CLK_GATE, .parents = { JZ4770_CLK_PLL0, }, .div = { CGU_REG_CPCCR, 12, 1, 4, 22, -1, -1 }, + .gate = { CGU_REG_OPCR, 31, true }, // disable CCLK stop on idle }, [JZ4770_CLK_PCLK] = { "pclk", CGU_CLK_DIV, -- 2.45.2