From 4e1c1f0785a01448cd9112d456c0dda2bc652046 Mon Sep 17 00:00:00 2001 From: Sean Wang Date: Wed, 11 Apr 2018 16:54:03 +0800 Subject: [PATCH] arm: dts: mt7623: add MT7623A SoC level DTS Add a common file for MT7623A SoC level DTS, indicating MT7623A only has a specific definition for power domain. That causes we need to change related consumers devices such as audio, ethernet, crypto, NAND, and USB controller to grasp its own power domain it should belong to. Signed-off-by: Sean Wang Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt7623a.dtsi | 44 ++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 arch/arm/boot/dts/mt7623a.dtsi diff --git a/arch/arm/boot/dts/mt7623a.dtsi b/arch/arm/boot/dts/mt7623a.dtsi new file mode 100644 index 000000000000..0735a1fb8ad9 --- /dev/null +++ b/arch/arm/boot/dts/mt7623a.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2017-2018 MediaTek Inc. + * Author: Sean Wang + * + */ + +/dts-v1/; +#include +#include "mt7623.dtsi" + +&afe { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; +}; + +&crypto { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>; +}; + +ð { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>; +}; + +&nandc { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; +}; + +&pcie { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; +}; + +&scpsys { + compatible = "mediatek,mt7623a-scpsys"; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>; + clock-names = "ethif"; +}; + +&usb1 { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; +}; + +&usb2 { + power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; +}; -- 2.45.2