From 64f4896592b5ac830bc0c7daf91ea21100eb54be Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 11 Oct 2016 15:26:06 +0900 Subject: [PATCH] ARM: dts: uniphier: add clocks/resets to EHCI nodes of sLD3 SoC Now, the clock/reset controller driver is available for this SoC. Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-sld3.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/uniphier-sld3.dtsi b/arch/arm/boot/dts/uniphier-sld3.dtsi index 5f57a96e4e13..a75189f7d8fe 100644 --- a/arch/arm/boot/dts/uniphier-sld3.dtsi +++ b/arch/arm/boot/dts/uniphier-sld3.dtsi @@ -242,6 +242,9 @@ usb0: usb@5a800100 { status = "disabled"; reg = <0x5a800100 0x100>; interrupts = <0 80 4>; + clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, + <&mio_rst 12>; }; usb1: usb@5a810100 { @@ -249,6 +252,9 @@ usb1: usb@5a810100 { status = "disabled"; reg = <0x5a810100 0x100>; interrupts = <0 81 4>; + clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, + <&mio_rst 13>; }; usb2: usb@5a820100 { @@ -256,6 +262,9 @@ usb2: usb@5a820100 { status = "disabled"; reg = <0x5a820100 0x100>; interrupts = <0 82 4>; + clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, + <&mio_rst 14>; }; usb3: usb@5a830100 { @@ -263,6 +272,9 @@ usb3: usb@5a830100 { status = "disabled"; reg = <0x5a830100 0x100>; interrupts = <0 83 4>; + clocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>; + resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>, + <&mio_rst 15>; }; sysctrl@f1840000 { -- 2.45.2