From 7df49149b29c978162fa68fe4db8160f294e12a0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 28 Nov 2019 20:23:58 +0200 Subject: [PATCH] drm/i915: Use the correct PCH transcoder for LPT/WPT in intel_sanitize_frame_start_delay() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit LPT/WPT only have PCH transcoder A. Make sure we poke at its chicken register instead of some non-existent register when FDI is being driven by pipe B or C. Cc: Uma Shankar Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20191128182358.14477-1-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 7d6d0393d73f..7ba12d603f59 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -17272,7 +17272,8 @@ static void intel_sanitize_frame_start_delay(const struct intel_crtc_state *crtc val |= TRANS_FRAME_START_DELAY(0); I915_WRITE(reg, val); } else { - i915_reg_t reg = TRANS_CHICKEN2(crtc->pipe); + enum pipe pch_transcoder = intel_crtc_pch_transcoder(crtc); + i915_reg_t reg = TRANS_CHICKEN2(pch_transcoder); u32 val; val = I915_READ(reg); -- 2.45.2