From 9a0baee960a718b2fde249b7d9197641fb8eb08d Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 3 Jun 2015 12:43:41 +0100 Subject: [PATCH] ARM: tegra: Enable CPUFreq support for Tegra124 Chromebooks Add the device-tree DFLL clock node and CPU regulator phandle for Tegra124 Chromebooks to enable CPUFreq support on these boards. Signed-off-by: Jon Hunter Reviewed-by: Tomeu Vizoso Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124-nyan.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi index a9aec23e06f2..40c23a0b7cfc 100644 --- a/arch/arm/boot/dts/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi @@ -159,7 +159,7 @@ regulators { vin-ldo9-10-supply = <&vdd_5v0_sys>; vin-ldo11-supply = <&vdd_3v3_run>; - sd0 { + vdd_cpu: sd0 { regulator-name = "+VDD_CPU_AP"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1350000>; @@ -397,6 +397,13 @@ sdhci@0,700b0600 { /* eMMC on this bus */ non-removable; }; + /* CPU DFLL clock */ + clock@0,70110000 { + status = "okay"; + vdd-cpu-supply = <&vdd_cpu>; + nvidia,i2c-fs-rate = <400000>; + }; + ahub@0,70300000 { i2s@0,70301100 { status = "okay"; @@ -487,6 +494,12 @@ clk32k_in: clock@0 { }; }; + cpus { + cpu@0 { + vdd-cpu-supply = <&vdd_cpu>; + }; + }; + gpio-keys { compatible = "gpio-keys"; -- 2.45.2