From b8d20e06eaad4c2bd64746cacd95be9a5d3e747f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 30 Oct 2015 11:46:16 +0900 Subject: [PATCH] serial: 8250_uniphier: add earlycon support This reuses the code of drivers/tty/serial/8250/8250_early.c except - Overwrite device->port.iotype and device->port.regshift for UPIO_MEM32 because of_setup_earlycon() has set them for UPIO_MEM. - Set device->baud to zero to prevent early8250_setup() from initializing the divisor register because port->uartclk does not match the frequency expected by this hardware. Signed-off-by: Masahiro Yamada Reviewed-by: Peter Hurley Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_uniphier.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c index d11621e2cf1d..1e2237a9c489 100644 --- a/drivers/tty/serial/8250/8250_uniphier.c +++ b/drivers/tty/serial/8250/8250_uniphier.c @@ -13,6 +13,7 @@ */ #include +#include #include #include #include @@ -34,6 +35,29 @@ struct uniphier8250_priv { spinlock_t atomic_write_lock; }; +#ifdef CONFIG_SERIAL_8250_CONSOLE +static int __init uniphier_early_console_setup(struct earlycon_device *device, + const char *options) +{ + if (!device->port.membase) + return -ENODEV; + + /* This hardware always expects MMIO32 register interface. */ + device->port.iotype = UPIO_MEM32; + device->port.regshift = 2; + + /* + * Do not touch the divisor register in early_serial8250_setup(); + * we assume it has been initialized by a boot loader. + */ + device->baud = 0; + + return early_serial8250_setup(device, options); +} +OF_EARLYCON_DECLARE(uniphier, "socionext,uniphier-uart", + uniphier_early_console_setup); +#endif + /* * The register map is slightly different from that of 8250. * IO callbacks must be overridden for correct access to FCR, LCR, and MCR. -- 2.45.2