From cf3c5397835f1bbfb69941b50b970210479cd6f9 Mon Sep 17 00:00:00 2001 From: Markus Reichl Date: Thu, 9 Jan 2020 16:42:10 +0100 Subject: [PATCH] arm64: dts: rockchip: Enable sdio0 and uart0 on rk3399-roc-pc-mezzanine The mezzanine board carries an E key type M.2 slot. This is connected to USB, SDIO and UART0. Enable sdio and uart0 for use with wlan and/or bt M.2 cards. Signed-off-by: Markus Reichl Link: https://lore.kernel.org/r/20200109154211.1530-1-m.reichl@fivetechno.de Signed-off-by: Heiko Stuebner --- .../dts/rockchip/rk3399-roc-pc-mezzanine.dts | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts index 2db9d32ad54a..2acb3d500fb9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts @@ -70,3 +70,24 @@ pcie_perst: pcie-perst { }; }; }; + +&sdio0 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_ngff>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; +}; -- 2.45.2