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drm/i915/gt: Mark context->state vma as active while pinned
2020-01-07 Manasi Navaredrm/i915/dp: Disable Port sync mode correctly on teardown
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-10-18 Manasi Navaredrm/i915/display/icl: In port sync mode disable slaves...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-10-18 Manasi Navaredrm/i915/display/icl: Disable transcoder port sync...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-10-18 Manasi Navaredrm/i915/display/icl: Enable master-slaves in trans port sync
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-10-18 Manasi Navaredrm/i915/display/icl: HW state readout for transcoder...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-10-18 Manasi Navaredrm/i915/display/icl: Enable TRANSCODER PORT SYNC for...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-10-18 Manasi Navaredrm/i915/display/icl: Save Master transcoder in slave...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-09-13 Manasi Navaredrm/i915/display/icl: Bump up the plane/fb height
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-09-13 Manasi Navaredrm/i915/display/icl: Bump up the hdisplay and vdisplay...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-08-29 Manasi Navaredrm/i915/display: Move the commit_tail() disable sequence...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-08-29 Manasi Navaredrm/i915/display: Rename update_crtcs() to commit_modeset_en...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-08-27 Manasi Navaredrm/i915/dp: Fix DSC enable code to use cpu_transcoder...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-08-22 Manasi Navaredrm/i915/dp: Fix DSC enable code to use cpu_transcoder...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-04-15 Manasi Navaredrm/i915: Nuke drm_crtc_state and use intel_atomic_state instead
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-04-10 Manasi Navaredrm/i915/dp: Expose force_dsc_enable through debugfs
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-03-21 Manasi Navaredrm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-03-20 Manasi Navaredrm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-03-14 Manasi Navaredrm/dp: Set the connector's TILE property even for...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2019-02-08 Manasi Navaredrm/dsc: Add kernel documentation for DRM DP DSC helpers
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-12-20 Manasi Navaredrm/i915/dsc: Fix the deadlock in dsc debugfs node
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-12-17 Manasi Navaredrm/i915/dsc: Add Per connector debugfs node for DSC...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-12-03 Manasi Navaredrm/i915/dp: Fix link compute m_n calc for DSC
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dsc: Enable and disable appropriate power...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Disable DSC in source by disabling DSS CTL bits
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Configure Display stream splitter registers...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Configure i915 Picture parameter Set registers...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Do not enable PSR2 if DSC is enabled
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Compute DSC pipe config in atomic check
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-29 Manasi Navaredrm/i915/dp: Add DSC params and DSC config to intel_crtc_state
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-28 Manasi Navaredrm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-28 Manasi Navaredrm/dsc: Add helpers for DSC picture parameter set infoframes
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-27 Manasi Navaredrm/dsc: Define VESA Display Stream Compression Capabilities
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-27 Manasi Navaredrm/dsc: Define Display Stream Compression PPS infoframe
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-27 Manasi Navaredrm/dsc: Modify DRM helper to return complete DSC color...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-11-06 Manasi Navaredrm/i915/icl: Fix the macros for DFLEXDPMLE register bits
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/i915/ICL: Add pre_pll_enable hook for ICL and set...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/i915/icl: Fix the macros for DFLEXDPMLE register bits
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/dp: Define payload size for DP SDP PPS packet
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/i915/dp: Validate modes using max Output BPP and...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/i915/dp: Add helpers for Compressed BPP and Slice...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/dp: DRM DP helper/macros to get DP sink DSC parameters
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/i915/dp: Cache the DP/eDP DSC DPCD register set...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-31 Manasi Navaredrm/dp: Add DP DSC DPCD receiver capability size define...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-20 Manasi Navaredrm/dp: Add definitions for eDP Rev 1.4a and 1.4b
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-18 Manasi Navaredrm/i915/dp: Link train Fallback on eDP only if fallback...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-09 Manasi Navaredrm/i915/dp: Link train Fallback on eDP only if fallback...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-03 Manasi Navaredrm: Fix kernel doc for DRM_MODE_PROP_IMMUTABLE
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-09-04 Manasi Navaredrm/i915/dsc: Fix PPS register definition macros for...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-08-28 Manasi Navaredrm/i915/dsc: Fix PPS register definition macros for...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-08-20 Manasi Navaredrm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLL
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-08-20 Manasi Navaredrm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_P...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-07-24 Manasi Navaredrm/i915/icl: Implement voltage swing programming sequence...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-07-24 Manasi Navaredrm/i915/icl: Add remaining registers and bitfields...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-14 Manasi Navaredrm/i915/dp: Add support for HBR3 and TPS4 during link training
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-14 Manasi Navaredrm/i915/icl: Add allowed DP rates for Icelake
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-12 Manasi Navaredrm/i915/icl: Add DDI HDMI level selection for ICL
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-01 Manasi Navaredrm/i915/icl: Get DDI clock for ICL based on PLLs.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-01 Manasi Navaredrm/i915/icl: Add register definition for DFLEXDPMLE
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-04-30 Manasi Navaredrm/i915/icl: Fix the DP Max Voltage for ICL
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-04-30 Manasi Navaredrm/i915/icl: Implement voltage swing programming sequence...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-04-27 Manasi Navaredrm/dp: Rename the edp_sdp_header as dp_sdp_header
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add register defs for voltage swing sequences...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add Combo PHY DDI Buffer translation...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add register definitions for Combo PHY...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-01 Manasi Navaredrm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-02-27 Manasi Navaredrm/i915/dp: Fix the order of platforms for setting...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-02-01 Manasi Navaredrm/i915/edp: Do not do link training fallback or prune...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-01-26 Manasi Navaredrm/dp: Add definitions for TPS4 bits and macros to...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-01-26 Manasi Navaredrm/dp: Add HBR3 support in existing DRM DP helpers
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-01-22 Manasi Navaredrm/i915/edp: Do not do link training fallback or prune...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-30 Manasi Navaredrm/i915: Cancel the modeset retry work during modeset cleanup
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-26 Manasi Navaredrm/i915: Cancel the modeset retry work during modeset cleanup
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-09 Manasi Navaredrm/i915/edp: Increase the T12 delay quirk to 1300ms
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-09 Manasi Navaredrm/i915/edp: Get the Panel Power Off timestamp after...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-05 Manasi Navaredrm/i915/edp: Increase the T12 delay quirk to 1300ms
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-05 Manasi Navaredrm/i915/edp: Get the Panel Power Off timestamp after...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-09-14 Manasi Navaredrm/i915/cnl: Change the macro name to DPLL_CFGCR0_DCO_FRACT...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-09-01 Manasi Navaredrm/i915/edp: Increase T12 panel delay to 900 ms to...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-08-31 Manasi Navaredrm/i915/edp: Increase T12 panel delay to 900 ms to...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-08-15 Manasi Navaredrm/i915/dp: Validate the compliance test link parameters
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-08-15 Manasi Navaredrm/i915/dp: Generalize intel_dp_link_params function...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-07-04 Manasi Navaredrm/i915/edp: Add a T12 panel delay quirk to fix DP...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-06-27 Manasi Navaredrm/i915/dp: Remove -1/+1 from t11_t12 for Gen9_LP/CNP case
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-06-27 Manasi Navaredrm/i915/dp: Fix the t11_t12 panel power cycle delay...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-04-13 Manasi Navaredrm/i915: Implement Link Rate fallback on Link training failure
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-04-12 Manasi Navaredrm/i915/dp: Validate cached link rate and lane count...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-03-01 Manasi Navaredrm/i915: Implement Link Rate fallback on Link training failure
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-03-01 Manasi Navaredrm: Fix the kernel doc warning for drm_link_status
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-02-27 Manasi Navaredrm: Add a new connector atomic property for link status
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-02-15 Manasi Navaredrm/i915/dp: Reset the link params on HPD/connected boot/resume
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm/i915: Add support for DP Video pattern compliance tests
test request (Manasi Navare)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm: Add definitions for DP compliance Video pattern tests
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm/i915: Fixes to support DP Compliance EDID tests
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm/i915: Add support for DP link training compliance
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-12-13 Manasi Navaredrm/i915: Move all the DP compliance data to a separate struct
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-12-13 Manasi Navaredrm/i915: Find fallback link rate/lane count
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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